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Antonio Nino Diazc326c342019-01-11 11:20:10 +00001/*
Govindraj Raja24d3a4e2023-12-21 13:57:49 -06002 * Copyright (c) 2019-2024, Arm Limited. All rights reserved.
Antonio Nino Diazc326c342019-01-11 11:20:10 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef ARCH_FEATURES_H
8#define ARCH_FEATURES_H
9
10#include <stdbool.h>
11
12#include <arch_helpers.h>
Andre Przywarae8920f62022-11-10 14:28:01 +000013#include <common/feat_detect.h>
Antonio Nino Diazc326c342019-01-11 11:20:10 +000014
Sona Mathew9e505f92024-03-13 11:33:54 -050015#define ISOLATE_FIELD(reg, feat, mask) \
16 ((unsigned int)(((reg) >> (feat)) & mask))
Andre Przywarabb0db3b2023-01-25 12:26:14 +000017
Sona Mathew9e505f92024-03-13 11:33:54 -050018#define CREATE_FEATURE_SUPPORTED(name, read_func, guard) \
19static inline bool is_ ## name ## _supported(void) \
20{ \
21 if ((guard) == FEAT_STATE_DISABLED) { \
22 return false; \
23 } \
24 if ((guard) == FEAT_STATE_ALWAYS) { \
25 return true; \
26 } \
27 return read_func(); \
Antonio Nino Diazd29d21e2019-02-06 09:23:04 +000028}
29
Sona Mathew9e505f92024-03-13 11:33:54 -050030#define CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
31static inline bool is_ ## name ## _present(void) \
32{ \
33 return (ISOLATE_FIELD(read_ ## idreg(), idfield, mask) >= idval) \
34 ? true : false; \
35}
36
37#define CREATE_FEATURE_FUNCS(name, idreg, idfield, mask, idval, guard) \
38CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
39CREATE_FEATURE_SUPPORTED(name, is_ ## name ## _present, guard)
40
41
42/* +----------------------------+
43 * | Features supported |
44 * +----------------------------+
45 * | GENTIMER |
46 * +----------------------------+
47 * | FEAT_PAN |
48 * +----------------------------+
49 * | FEAT_VHE |
50 * +----------------------------+
51 * | FEAT_TTCNP |
52 * +----------------------------+
53 * | FEAT_UAO |
54 * +----------------------------+
55 * | FEAT_PACQARMA3 |
56 * +----------------------------+
57 * | FEAT_PAUTH |
58 * +----------------------------+
59 * | FEAT_TTST |
60 * +----------------------------+
61 * | FEAT_BTI |
62 * +----------------------------+
63 * | FEAT_MTE2 |
64 * +----------------------------+
65 * | FEAT_SSBS |
66 * +----------------------------+
67 * | FEAT_NMI |
68 * +----------------------------+
69 * | FEAT_GCS |
70 * +----------------------------+
71 * | FEAT_EBEP |
72 * +----------------------------+
73 * | FEAT_SEBEP |
74 * +----------------------------+
75 * | FEAT_SEL2 |
76 * +----------------------------+
77 * | FEAT_TWED |
78 * +----------------------------+
79 * | FEAT_FGT |
80 * +----------------------------+
81 * | FEAT_EC/ECV2 |
82 * +----------------------------+
83 * | FEAT_RNG |
84 * +----------------------------+
85 * | FEAT_TCR2 |
86 * +----------------------------+
87 * | FEAT_S2POE |
88 * +----------------------------+
89 * | FEAT_S1POE |
90 * +----------------------------+
91 * | FEAT_S2PIE |
92 * +----------------------------+
93 * | FEAT_S1PIE |
94 * +----------------------------+
95 * | FEAT_AMU/AMUV1P1 |
96 * +----------------------------+
97 * | FEAT_MPAM |
98 * +----------------------------+
99 * | FEAT_HCX |
100 * +----------------------------+
101 * | FEAT_RNG_TRAP |
102 * +----------------------------+
103 * | FEAT_RME |
104 * +----------------------------+
105 * | FEAT_SB |
106 * +----------------------------+
107 * | FEAT_CSV2/CSV3 |
108 * +----------------------------+
109 * | FEAT_SPE |
110 * +----------------------------+
111 * | FEAT_SVE |
112 * +----------------------------+
113 * | FEAT_RAS |
114 * +----------------------------+
115 * | FEAT_DIT |
116 * +----------------------------+
117 * | FEAT_SYS_REG_TRACE |
118 * +----------------------------+
119 * | FEAT_TRF |
120 * +----------------------------+
121 * | FEAT_NV/NV2 |
122 * +----------------------------+
123 * | FEAT_BRBE |
124 * +----------------------------+
125 * | FEAT_TRBE |
126 * +----------------------------+
127 * | FEAT_SME/SME2 |
128 * +----------------------------+
129 * | FEAT_PMUV3 |
130 * +----------------------------+
131 * | FEAT_MTPMU |
132 * +----------------------------+
133 */
Andre Przywara97272942023-01-26 15:27:38 +0000134
Andre Przywara0dda4242023-04-18 16:58:36 +0100135static inline bool is_armv7_gentimer_present(void)
Andre Przywara98908b32022-11-17 16:42:09 +0000136{
Andre Przywara0dda4242023-04-18 16:58:36 +0100137 /* The Generic Timer is always present in an ARMv8-A implementation */
138 return true;
Andre Przywara98908b32022-11-17 16:42:09 +0000139}
140
Sona Mathew9e505f92024-03-13 11:33:54 -0500141/* FEAT_PAN: Privileged access never */
Andre Przywara0dda4242023-04-18 16:58:36 +0100142CREATE_FEATURE_FUNCS(feat_pan, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_PAN_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500143 ID_AA64MMFR1_EL1_PAN_MASK, 1U, ENABLE_FEAT_PAN)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000144
Sona Mathew9e505f92024-03-13 11:33:54 -0500145/* FEAT_VHE: Virtualization Host Extensions */
Andre Przywara0dda4242023-04-18 16:58:36 +0100146CREATE_FEATURE_FUNCS(feat_vhe, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_VHE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500147 ID_AA64MMFR1_EL1_VHE_MASK, 1U, ENABLE_FEAT_VHE)
Daniel Boulby44b43332020-11-25 16:36:46 +0000148
Sona Mathew9e505f92024-03-13 11:33:54 -0500149/* FEAT_TTCNP: Translation table common not private */
150CREATE_FEATURE_PRESENT(feat_ttcnp, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_CNP_SHIFT,
151 ID_AA64MMFR2_EL1_CNP_MASK, 1U)
Antonio Nino Diazc326c342019-01-11 11:20:10 +0000152
Sona Mathew9e505f92024-03-13 11:33:54 -0500153/* FEAT_UAO: User access override */
154CREATE_FEATURE_PRESENT(feat_uao, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_UAO_SHIFT,
155 ID_AA64MMFR2_EL1_UAO_MASK, 1U)
Juan Pablo Condee089a172022-06-29 17:44:43 -0400156
Sona Mathew9e505f92024-03-13 11:33:54 -0500157/* If any of the fields is not zero, QARMA3 algorithm is present */
158CREATE_FEATURE_PRESENT(feat_pacqarma3, id_aa64isar2_el1, 0,
159 ((ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
160 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT)), 1U)
Juan Pablo Condee089a172022-06-29 17:44:43 -0400161
Sona Mathew9e505f92024-03-13 11:33:54 -0500162/* PAUTH */
Antonio Nino Diaz25cda672019-02-19 11:53:51 +0000163static inline bool is_armv8_3_pauth_present(void)
164{
Juan Pablo Condee089a172022-06-29 17:44:43 -0400165 uint64_t mask_id_aa64isar1 =
166 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
167 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
168 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
169 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
Antonio Nino Diaz25cda672019-02-19 11:53:51 +0000170
Juan Pablo Condee089a172022-06-29 17:44:43 -0400171 /*
172 * If any of the fields is not zero or QARMA3 is present,
173 * PAuth is present
174 */
175 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
176 is_feat_pacqarma3_present());
Antonio Nino Diaz25cda672019-02-19 11:53:51 +0000177}
178
Sona Mathew9e505f92024-03-13 11:33:54 -0500179/* FEAT_TTST: Small translation tables */
180CREATE_FEATURE_PRESENT(feat_ttst, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_ST_SHIFT,
181 ID_AA64MMFR2_EL1_ST_MASK, 1U)
Alexei Fedorov90f2e882019-05-24 12:17:09 +0100182
Sona Mathew9e505f92024-03-13 11:33:54 -0500183/* FEAT_BTI: Branch target identification */
184CREATE_FEATURE_PRESENT(feat_bti, id_aa64pfr1_el1, ID_AA64PFR1_EL1_BT_SHIFT,
185 ID_AA64PFR1_EL1_BT_MASK, BTI_IMPLEMENTED)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000186
Sona Mathew9e505f92024-03-13 11:33:54 -0500187/* FEAT_MTE2: Memory tagging extension */
188CREATE_FEATURE_FUNCS(feat_mte2, id_aa64pfr1_el1, ID_AA64PFR1_EL1_MTE_SHIFT,
189 ID_AA64PFR1_EL1_MTE_MASK, MTE_IMPLEMENTED_ELX, ENABLE_FEAT_MTE2)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000190
Sona Mathew9e505f92024-03-13 11:33:54 -0500191/* FEAT_SSBS: Speculative store bypass safe */
192CREATE_FEATURE_PRESENT(feat_ssbs, id_aa64pfr1_el1, ID_AA64PFR1_EL1_SSBS_SHIFT,
193 ID_AA64PFR1_EL1_SSBS_MASK, 1U)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000194
Sona Mathew9e505f92024-03-13 11:33:54 -0500195/* FEAT_NMI: Non-maskable interrupts */
196CREATE_FEATURE_PRESENT(feat_nmi, id_aa64pfr1_el1, ID_AA64PFR1_EL1_NMI_SHIFT,
197 ID_AA64PFR1_EL1_NMI_MASK, NMI_IMPLEMENTED)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000198
Sona Mathew9e505f92024-03-13 11:33:54 -0500199/* FEAT_EBEP */
200CREATE_FEATURE_PRESENT(feat_ebep, id_aa64dfr1_el1, ID_AA64DFR1_EBEP_SHIFT,
201 ID_AA64DFR1_EBEP_MASK, EBEP_IMPLEMENTED)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000202
Sona Mathew9e505f92024-03-13 11:33:54 -0500203/* FEAT_SEBEP */
204CREATE_FEATURE_PRESENT(feat_sebep, id_aa64dfr0_el1, ID_AA64DFR0_SEBEP_SHIFT,
205 ID_AA64DFR0_SEBEP_MASK, SEBEP_IMPLEMENTED)
Manish Pandey5cfe5152024-01-09 15:55:20 +0000206
Sona Mathew9e505f92024-03-13 11:33:54 -0500207/* FEAT_SEL2: Secure EL2 */
Andre Przywara0dda4242023-04-18 16:58:36 +0100208CREATE_FEATURE_FUNCS(feat_sel2, id_aa64pfr0_el1, ID_AA64PFR0_SEL2_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500209 ID_AA64PFR0_SEL2_MASK, 1U, ENABLE_FEAT_SEL2)
210
211/* FEAT_TWED: Delayed trapping of WFE */
Andre Przywara0dda4242023-04-18 16:58:36 +0100212CREATE_FEATURE_FUNCS(feat_twed, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_TWED_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500213 ID_AA64MMFR1_EL1_TWED_MASK, 1U, ENABLE_FEAT_TWED)
214
215/* FEAT_FGT: Fine-grained traps */
Andre Przywara0dda4242023-04-18 16:58:36 +0100216CREATE_FEATURE_FUNCS(feat_fgt, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_FGT_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500217 ID_AA64MMFR0_EL1_FGT_MASK, 1U, ENABLE_FEAT_FGT)
218
219/* FEAT_ECV: Enhanced Counter Virtualization */
Andre Przywara0dda4242023-04-18 16:58:36 +0100220CREATE_FEATURE_FUNCS(feat_ecv, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_ECV_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500221 ID_AA64MMFR0_EL1_ECV_MASK, 1U, ENABLE_FEAT_ECV)
222CREATE_FEATURE_FUNCS(feat_ecv_v2, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_ECV_SHIFT,
223 ID_AA64MMFR0_EL1_ECV_MASK, ID_AA64MMFR0_EL1_ECV_SELF_SYNCH, ENABLE_FEAT_ECV)
Mark Brownc37eee72023-03-14 20:13:03 +0000224
Sona Mathew9e505f92024-03-13 11:33:54 -0500225/* FEAT_RNG: Random number generator */
Andre Przywara0dda4242023-04-18 16:58:36 +0100226CREATE_FEATURE_FUNCS(feat_rng, id_aa64isar0_el1, ID_AA64ISAR0_RNDR_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500227 ID_AA64ISAR0_RNDR_MASK, 1U, ENABLE_FEAT_RNG)
228
229/* FEAT_TCR2: Support TCR2_ELx regs */
Andre Przywara0dda4242023-04-18 16:58:36 +0100230CREATE_FEATURE_FUNCS(feat_tcr2, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_TCRX_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500231 ID_AA64MMFR3_EL1_TCRX_MASK, 1U, ENABLE_FEAT_TCR2)
Mark Brown293a6612023-03-14 20:48:43 +0000232
Sona Mathew9e505f92024-03-13 11:33:54 -0500233/* FEAT_S2POE */
Andre Przywara0dda4242023-04-18 16:58:36 +0100234CREATE_FEATURE_FUNCS(feat_s2poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2POE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500235 ID_AA64MMFR3_EL1_S2POE_MASK, 1U, ENABLE_FEAT_S2POE)
236
237/* FEAT_S1POE */
Andre Przywara0dda4242023-04-18 16:58:36 +0100238CREATE_FEATURE_FUNCS(feat_s1poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1POE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500239 ID_AA64MMFR3_EL1_S1POE_MASK, 1U, ENABLE_FEAT_S1POE)
240
Mark Brown293a6612023-03-14 20:48:43 +0000241static inline bool is_feat_sxpoe_supported(void)
242{
243 return is_feat_s1poe_supported() || is_feat_s2poe_supported();
244}
245
Sona Mathew9e505f92024-03-13 11:33:54 -0500246/* FEAT_S2PIE */
Andre Przywara0dda4242023-04-18 16:58:36 +0100247CREATE_FEATURE_FUNCS(feat_s2pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2PIE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500248 ID_AA64MMFR3_EL1_S2PIE_MASK, 1U, ENABLE_FEAT_S2PIE)
249
250/* FEAT_S1PIE */
Andre Przywara0dda4242023-04-18 16:58:36 +0100251CREATE_FEATURE_FUNCS(feat_s1pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1PIE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500252 ID_AA64MMFR3_EL1_S1PIE_MASK, 1U, ENABLE_FEAT_S1PIE)
253
Mark Brown293a6612023-03-14 20:48:43 +0000254static inline bool is_feat_sxpie_supported(void)
255{
256 return is_feat_s1pie_supported() || is_feat_s2pie_supported();
257}
258
Andre Przywara0dda4242023-04-18 16:58:36 +0100259/* FEAT_GCS: Guarded Control Stack */
260CREATE_FEATURE_FUNCS(feat_gcs, id_aa64pfr1_el1, ID_AA64PFR1_EL1_GCS_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500261 ID_AA64PFR1_EL1_GCS_MASK, 1U, ENABLE_FEAT_GCS)
Andre Przywara2c550e32022-11-10 14:41:07 +0000262
Andre Przywara0dda4242023-04-18 16:58:36 +0100263/* FEAT_AMU: Activity Monitors Extension */
264CREATE_FEATURE_FUNCS(feat_amu, id_aa64pfr0_el1, ID_AA64PFR0_AMU_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500265 ID_AA64PFR0_AMU_MASK, 1U, ENABLE_FEAT_AMU)
266
267/* FEAT_AMUV1P1: AMU Extension v1.1 */
268CREATE_FEATURE_FUNCS(feat_amuv1p1, id_aa64pfr0_el1, ID_AA64PFR0_AMU_SHIFT,
269 ID_AA64PFR0_AMU_MASK, ID_AA64PFR0_AMU_V1P1, ENABLE_FEAT_AMUv1p1)
johpow01fa59c6f2020-10-02 13:41:11 -0500270
Alexei Fedorov19933552020-05-26 13:16:41 +0100271/*
272 * Return MPAM version:
273 *
274 * 0x00: None Armv8.0 or later
275 * 0x01: v0.1 Armv8.4 or later
276 * 0x10: v1.0 Armv8.2 or later
277 * 0x11: v1.1 Armv8.4 or later
278 *
279 */
Sona Mathew9e505f92024-03-13 11:33:54 -0500280static inline bool is_feat_mpam_present(void)
Alexei Fedorov19933552020-05-26 13:16:41 +0100281{
Sona Mathew9e505f92024-03-13 11:33:54 -0500282 unsigned int ret = (unsigned int)((((read_id_aa64pfr0_el1() >>
Alexei Fedorov19933552020-05-26 13:16:41 +0100283 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
Sona Mathew9e505f92024-03-13 11:33:54 -0500284 ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_MPAM_FRAC_SHIFT)
285 & ID_AA64PFR1_MPAM_FRAC_MASK));
286 return ret;
Alexei Fedorov19933552020-05-26 13:16:41 +0100287}
288
Sona Mathew9e505f92024-03-13 11:33:54 -0500289CREATE_FEATURE_SUPPORTED(feat_mpam, is_feat_mpam_present, ENABLE_FEAT_MPAM)
Andre Przywaraf20ad902022-11-15 11:45:19 +0000290
Andre Przywara0dda4242023-04-18 16:58:36 +0100291/* FEAT_HCX: Extended Hypervisor Configuration Register */
292CREATE_FEATURE_FUNCS(feat_hcx, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_HCX_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500293 ID_AA64MMFR1_EL1_HCX_MASK, 1U, ENABLE_FEAT_HCX)
johpow01f91e59f2021-08-04 19:38:18 -0500294
Sona Mathew9e505f92024-03-13 11:33:54 -0500295/* FEAT_RNG_TRAP: Trapping support */
296CREATE_FEATURE_PRESENT(feat_rng_trap, id_aa64pfr1_el1, ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT,
297 ID_AA64PFR1_EL1_RNDR_TRAP_MASK, RNG_TRAP_IMPLEMENTED)
Juan Pablo Conde42305f22022-07-12 16:40:29 -0400298
Sona Mathew9e505f92024-03-13 11:33:54 -0500299/* Return the RME version, zero if not supported. */
300CREATE_FEATURE_FUNCS(feat_rme, id_aa64pfr0_el1, ID_AA64PFR0_FEAT_RME_SHIFT,
301 ID_AA64PFR0_FEAT_RME_MASK, 1U, ENABLE_RME)
Zelalem Aweke79e3d292021-07-08 16:51:14 -0500302
Sona Mathew9e505f92024-03-13 11:33:54 -0500303/* FEAT_SB: Speculation barrier instruction */
304CREATE_FEATURE_PRESENT(feat_sb, id_aa64isar1_el1, ID_AA64ISAR1_SB_SHIFT,
305 ID_AA64ISAR1_SB_MASK, 1U)
Andre Przywara06ea44e2022-11-17 17:30:43 +0000306
Sona Mathew3b84c962023-10-25 16:48:19 -0500307/*
308 * FEAT_CSV2: Cache Speculation Variant 2. This checks bit fields[56-59]
309 * of id_aa64pfr0_el1 register and can be used to check for below features:
310 * FEAT_CSV2_2: Cache Speculation Variant CSV2_2.
311 * FEAT_CSV2_3: Cache Speculation Variant CSV2_3.
312 * 0b0000 - Feature FEAT_CSV2 is not implemented.
313 * 0b0001 - Feature FEAT_CSV2 is implemented, but FEAT_CSV2_2 and FEAT_CSV2_3
314 * are not implemented.
315 * 0b0010 - Feature FEAT_CSV2_2 is implemented but FEAT_CSV2_3 is not
316 * implemented.
317 * 0b0011 - Feature FEAT_CSV2_3 is implemented.
318 */
Sona Mathew3b84c962023-10-25 16:48:19 -0500319
Sona Mathew9e505f92024-03-13 11:33:54 -0500320CREATE_FEATURE_FUNCS(feat_csv2_2, id_aa64pfr0_el1, ID_AA64PFR0_CSV2_SHIFT,
321 ID_AA64PFR0_CSV2_MASK, CSV2_2_IMPLEMENTED, ENABLE_FEAT_CSV2_2)
322CREATE_FEATURE_FUNCS(feat_csv2_3, id_aa64pfr0_el1, ID_AA64PFR0_CSV2_SHIFT,
323 ID_AA64PFR0_CSV2_MASK, CSV2_3_IMPLEMENTED, ENABLE_FEAT_CSV2_3)
Andre Przywara06ea44e2022-11-17 17:30:43 +0000324
Andre Przywara0dda4242023-04-18 16:58:36 +0100325/* FEAT_SPE: Statistical Profiling Extension */
326CREATE_FEATURE_FUNCS(feat_spe, id_aa64dfr0_el1, ID_AA64DFR0_PMS_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500327 ID_AA64DFR0_PMS_MASK, 1U, ENABLE_SPE_FOR_NS)
Andre Przywara06ea44e2022-11-17 17:30:43 +0000328
Andre Przywara0dda4242023-04-18 16:58:36 +0100329/* FEAT_SVE: Scalable Vector Extension */
330CREATE_FEATURE_FUNCS(feat_sve, id_aa64pfr0_el1, ID_AA64PFR0_SVE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500331 ID_AA64PFR0_SVE_MASK, 1U, ENABLE_SVE_FOR_NS)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000332
Andre Przywara0dda4242023-04-18 16:58:36 +0100333/* FEAT_RAS: Reliability, Accessibility, Serviceability */
Sona Mathew9e505f92024-03-13 11:33:54 -0500334CREATE_FEATURE_FUNCS(feat_ras, id_aa64pfr0_el1, ID_AA64PFR0_RAS_SHIFT,
335 ID_AA64PFR0_RAS_MASK, 1U, ENABLE_FEAT_RAS)
Andre Przywaraedc449d2023-01-27 14:09:20 +0000336
Andre Przywara0dda4242023-04-18 16:58:36 +0100337/* FEAT_DIT: Data Independent Timing instructions */
Sona Mathew9e505f92024-03-13 11:33:54 -0500338CREATE_FEATURE_FUNCS(feat_dit, id_aa64pfr0_el1, ID_AA64PFR0_DIT_SHIFT,
339 ID_AA64PFR0_DIT_MASK, 1U, ENABLE_FEAT_DIT)
Andre Przywaraedc449d2023-01-27 14:09:20 +0000340
Sona Mathew9e505f92024-03-13 11:33:54 -0500341/* FEAT_SYS_REG_TRACE */
342CREATE_FEATURE_FUNCS(feat_sys_reg_trace, id_aa64dfr0_el1, ID_AA64DFR0_TRACEVER_SHIFT,
343 ID_AA64DFR0_TRACEVER_MASK, 1U, ENABLE_SYS_REG_TRACE_FOR_NS)
Andre Przywaraedc449d2023-01-27 14:09:20 +0000344
Andre Przywara0dda4242023-04-18 16:58:36 +0100345/* FEAT_TRF: TraceFilter */
346CREATE_FEATURE_FUNCS(feat_trf, id_aa64dfr0_el1, ID_AA64DFR0_TRACEFILT_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500347 ID_AA64DFR0_TRACEFILT_MASK, 1U, ENABLE_TRF_FOR_NS)
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000348
Andre Przywara0dda4242023-04-18 16:58:36 +0100349/* FEAT_NV2: Enhanced Nested Virtualization */
Sona Mathew9e505f92024-03-13 11:33:54 -0500350CREATE_FEATURE_FUNCS(feat_nv, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_NV_SHIFT,
351 ID_AA64MMFR2_EL1_NV_MASK, 1U, 0U)
352CREATE_FEATURE_FUNCS(feat_nv2, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_NV_SHIFT,
353 ID_AA64MMFR2_EL1_NV_MASK, NV2_IMPLEMENTED, CTX_INCLUDE_NEVE_REGS)
Andre Przywarac97c5512022-11-17 16:42:09 +0000354
Andre Przywara0dda4242023-04-18 16:58:36 +0100355/* FEAT_BRBE: Branch Record Buffer Extension */
356CREATE_FEATURE_FUNCS(feat_brbe, id_aa64dfr0_el1, ID_AA64DFR0_BRBE_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500357 ID_AA64DFR0_BRBE_MASK, 1U, ENABLE_BRBE_FOR_NS)
Andre Przywarac97c5512022-11-17 16:42:09 +0000358
Andre Przywara0dda4242023-04-18 16:58:36 +0100359/* FEAT_TRBE: Trace Buffer Extension */
360CREATE_FEATURE_FUNCS(feat_trbe, id_aa64dfr0_el1, ID_AA64DFR0_TRACEBUFFER_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500361 ID_AA64DFR0_TRACEBUFFER_MASK, 1U, ENABLE_TRBE_FOR_NS)
Andre Przywarac97c5512022-11-17 16:42:09 +0000362
Sona Mathew9e505f92024-03-13 11:33:54 -0500363/* FEAT_SME_FA64: Full A64 Instruction support in streaming SVE mode */
364CREATE_FEATURE_PRESENT(feat_sme_fa64, id_aa64smfr0_el1, ID_AA64SMFR0_EL1_SME_FA64_SHIFT,
365 ID_AA64SMFR0_EL1_SME_FA64_MASK, 1U)
366
Andre Przywara0dda4242023-04-18 16:58:36 +0100367/* FEAT_SMEx: Scalar Matrix Extension */
368CREATE_FEATURE_FUNCS(feat_sme, id_aa64pfr1_el1, ID_AA64PFR1_EL1_SME_SHIFT,
Sona Mathew9e505f92024-03-13 11:33:54 -0500369 ID_AA64PFR1_EL1_SME_MASK, 1U, ENABLE_SME_FOR_NS)
370
371CREATE_FEATURE_FUNCS(feat_sme2, id_aa64pfr1_el1, ID_AA64PFR1_EL1_SME_SHIFT,
372 ID_AA64PFR1_EL1_SME_MASK, SME2_IMPLEMENTED, ENABLE_SME2_FOR_NS)
Jayanth Dodderi Chidanandcfe053a2022-11-08 10:31:07 +0000373
Javier Almansa Sobrino8c8107e2023-05-03 12:16:11 +0100374/*******************************************************************************
375 * Function to get hardware granularity support
376 ******************************************************************************/
377
Sona Mathew9e505f92024-03-13 11:33:54 -0500378static inline bool is_feat_tgran4K_present(void)
Javier Almansa Sobrino8c8107e2023-05-03 12:16:11 +0100379{
Sona Mathew9e505f92024-03-13 11:33:54 -0500380 unsigned int tgranx = ISOLATE_FIELD(read_id_aa64mmfr0_el1(),
381 ID_AA64MMFR0_EL1_TGRAN4_SHIFT, ID_REG_FIELD_MASK);
382 return (tgranx < 8U);
Javier Almansa Sobrino8c8107e2023-05-03 12:16:11 +0100383}
384
Sona Mathew9e505f92024-03-13 11:33:54 -0500385CREATE_FEATURE_PRESENT(feat_tgran16K, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_TGRAN16_SHIFT,
386 ID_AA64MMFR0_EL1_TGRAN16_MASK, TGRAN16_IMPLEMENTED)
Javier Almansa Sobrino8c8107e2023-05-03 12:16:11 +0100387
Sona Mathew9e505f92024-03-13 11:33:54 -0500388static inline bool is_feat_tgran64K_present(void)
Boyan Karatotev05504ba2023-02-15 13:21:50 +0000389{
Sona Mathew9e505f92024-03-13 11:33:54 -0500390 unsigned int tgranx = ISOLATE_FIELD(read_id_aa64mmfr0_el1(),
391 ID_AA64MMFR0_EL1_TGRAN64_SHIFT, ID_REG_FIELD_MASK);
392 return (tgranx < 8U);
Boyan Karatotev05504ba2023-02-15 13:21:50 +0000393}
394
Sona Mathew9e505f92024-03-13 11:33:54 -0500395/* FEAT_PMUV3 */
396CREATE_FEATURE_PRESENT(feat_pmuv3, id_aa64dfr0_el1, ID_AA64DFR0_PMUVER_SHIFT,
397 ID_AA64DFR0_PMUVER_MASK, 1U)
Boyan Karatotev677ed8a2023-02-16 09:45:29 +0000398
Sona Mathew9e505f92024-03-13 11:33:54 -0500399/* FEAT_MTPMU */
400static inline bool is_feat_mtpmu_present(void)
Boyan Karatotev677ed8a2023-02-16 09:45:29 +0000401{
Sona Mathew9e505f92024-03-13 11:33:54 -0500402 unsigned int mtpmu = ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT,
403 ID_AA64DFR0_MTPMU_MASK);
Sona Mathewe480ec22024-03-11 15:58:15 -0500404 return (mtpmu != 0U) && (mtpmu != MTPMU_NOT_IMPLEMENTED);
Boyan Karatotev677ed8a2023-02-16 09:45:29 +0000405}
406
Sona Mathew9e505f92024-03-13 11:33:54 -0500407CREATE_FEATURE_SUPPORTED(feat_mtpmu, is_feat_mtpmu_present, DISABLE_MTPMU)
408
Antonio Nino Diazc326c342019-01-11 11:20:10 +0000409#endif /* ARCH_FEATURES_H */