blob: 46b0e81cef787c53496b411b7a8cf99a0c5cf6a0 [file] [log] [blame]
Boyan Karatotev9ac73a42023-11-14 09:38:08 +00001/*
2 * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Leo Yan815f5502024-04-24 09:57:28 +01007#define GIC_CTRL_ADDR 2c010000
8#define GIC_GICR_OFFSET 0x200000
9#define UART_OFFSET 0x1000
10#define VENCODER_TIMING_CLK 25175000
11#define VENCODER_TIMING \
12 clock-frequency = <VENCODER_TIMING_CLK>; \
13 hactive = <640>; \
14 vactive = <480>; \
15 hfront-porch = <16>; \
16 hback-porch = <48>; \
17 hsync-len = <96>; \
18 vfront-porch = <10>; \
19 vback-porch = <33>; \
20 vsync-len = <2>
Leo Yan815f5502024-04-24 09:57:28 +010021
Boyan Karatotev9ac73a42023-11-14 09:38:08 +000022/ {
Leo Yane0c24102024-04-15 11:35:15 +010023 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 ethernet: ethernet@18000000 {
28 compatible = "smsc,lan91c111";
29 };
30
31 mmci: mmci@1c050000 {
32 cd-gpios = <&sysreg 0 0>;
33 };
34
Boyan Karatotev9ac73a42023-11-14 09:38:08 +000035 rtc@1c170000 {
36 compatible = "arm,pl031", "arm,primecell";
37 reg = <0x0 0x1C170000 0x0 0x1000>;
38 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
39 clocks = <&soc_refclk>;
40 clock-names = "apb_pclk";
41 };
42
43 kmi@1c060000 {
44 compatible = "arm,pl050", "arm,primecell";
45 reg = <0x0 0x001c060000 0x0 0x1000>;
46 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
47 clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;
48 clock-names = "KMIREFCLK", "apb_pclk";
49 };
50
51 kmi@1c070000 {
52 compatible = "arm,pl050", "arm,primecell";
53 reg = <0x0 0x001c070000 0x0 0x1000>;
54 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
55 clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;
56 clock-names = "KMIREFCLK", "apb_pclk";
57 };
58
59 virtio_block@1c130000 {
60 compatible = "virtio,mmio";
61 reg = <0x0 0x1c130000 0x0 0x200>;
62 /* spec lists this wrong */
63 interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
64 };
65};