blob: 40cd29e36f2dd60867a56d6ab73fbdf86774c643 [file] [log] [blame]
Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <arm_gic.h>
33#include <bl_common.h>
34#include <cci.h>
35#include <debug.h>
36#include <string.h>
37#include <xlat_tables.h>
38#include <platform_def.h>
39#include <plat_private.h>
Sandrine Bailleux7659a262016-07-05 09:55:03 +010040#include <utils.h>
Tony Xief6118cc2016-01-15 17:17:32 +080041
42#ifdef PLAT_RK_CCI_BASE
43static const int cci_map[] = {
44 PLAT_RK_CCI_CLUSTER0_SL_IFACE_IX,
45 PLAT_RK_CCI_CLUSTER1_SL_IFACE_IX
46};
47#endif
48
49/******************************************************************************
50 * Macro generating the code for the function setting up the pagetables as per
51 * the platform memory map & initialize the mmu, for the given exception level
52 ******************************************************************************/
53#define DEFINE_CONFIGURE_MMU_EL(_el) \
54 void plat_configure_mmu_el ## _el(unsigned long total_base, \
55 unsigned long total_size, \
56 unsigned long ro_start, \
57 unsigned long ro_limit, \
58 unsigned long coh_start, \
59 unsigned long coh_limit) \
60 { \
61 mmap_add_region(total_base, total_base, \
62 total_size, \
63 MT_MEMORY | MT_RW | MT_SECURE); \
64 mmap_add_region(ro_start, ro_start, \
65 ro_limit - ro_start, \
66 MT_MEMORY | MT_RO | MT_SECURE); \
67 mmap_add_region(coh_start, coh_start, \
68 coh_limit - coh_start, \
69 MT_DEVICE | MT_RW | MT_SECURE); \
70 mmap_add(plat_rk_mmap); \
71 init_xlat_tables(); \
72 \
73 enable_mmu_el ## _el(0); \
74 }
75
76/* Define EL3 variants of the function initialising the MMU */
77DEFINE_CONFIGURE_MMU_EL(3)
78
Antonio Nino Diaze82e29c2016-05-19 10:00:28 +010079unsigned int plat_get_syscnt_freq2(void)
Tony Xief6118cc2016-01-15 17:17:32 +080080{
81 return SYS_COUNTER_FREQ_IN_TICKS;
82}
83
84void plat_cci_init(void)
85{
86#ifdef PLAT_RK_CCI_BASE
87 /* Initialize CCI driver */
88 cci_init(PLAT_RK_CCI_BASE, cci_map, ARRAY_SIZE(cci_map));
89#endif
90}
91
92void plat_cci_enable(void)
93{
94 /*
95 * Enable CCI coherency for this cluster.
96 * No need for locks as no other cpu is active at the moment.
97 */
98#ifdef PLAT_RK_CCI_BASE
99 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
100#endif
101}
102
103void plat_cci_disable(void)
104{
105#ifdef PLAT_RK_CCI_BASE
106 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
107#endif
108}