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Soby Mathew49473e42015-06-10 13:49:59 +01001/*
Soby Mathew0d786072016-03-24 16:56:29 +00002 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
Soby Mathew49473e42015-06-10 13:49:59 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathew49473e42015-06-10 13:49:59 +01005 */
6
7#ifndef __PSCI_COMPAT_H__
8#define __PSCI_COMPAT_H__
9
10#include <arch.h>
11#include <platform_def.h>
12
13#ifndef __ASSEMBLY__
14/*
15 * The below declarations are to enable compatibility for the platform ports
16 * using the old platform interface and psci helpers.
17 */
18#define PLAT_MAX_PWR_LVL PLATFORM_MAX_AFFLVL
19#define PLAT_NUM_PWR_DOMAINS PLATFORM_NUM_AFFS
20
21/*******************************************************************************
22 * PSCI affinity related constants. An affinity instance could
23 * be present or absent physically to cater for asymmetric topologies.
24 ******************************************************************************/
25#define PSCI_AFF_ABSENT 0x0
26#define PSCI_AFF_PRESENT 0x1
27
28#define PSCI_STATE_ON 0x0
29#define PSCI_STATE_OFF 0x1
30#define PSCI_STATE_ON_PENDING 0x2
31#define PSCI_STATE_SUSPEND 0x3
32
33/*
34 * Using the compatibility platform interfaces means that the local states
35 * used in psci_power_state_t need to only convey whether its power down
36 * or standby state. The onus is on the platform port to do the right thing
37 * including the state coordination in case multiple power down states are
38 * involved. Hence if we assume 3 generic states viz, run, standby and
39 * power down, we can assign 1 and 2 to standby and power down respectively.
40 */
41#define PLAT_MAX_RET_STATE 1
42#define PLAT_MAX_OFF_STATE 2
43
Soby Mathew011ca182015-07-29 17:05:03 +010044/*
45 * Macro to represent invalid affinity level within PSCI.
46 */
47#define PSCI_INVALID_DATA -1
Soby Mathew49473e42015-06-10 13:49:59 +010048
49#define psci_get_pstate_afflvl(pstate) psci_get_pstate_pwrlvl(pstate)
50
51/*
52 * This array stores the 'power_state' requests of each CPU during
53 * CPU_SUSPEND and SYSTEM_SUSPEND which will be populated by the
54 * compatibility layer when appropriate platform hooks are invoked.
55 */
56extern unsigned int psci_power_state_compat[PLATFORM_CORE_COUNT];
57
58/*******************************************************************************
59 * Structure populated by platform specific code to export routines which
60 * perform common low level pm functions
61 ******************************************************************************/
62typedef struct plat_pm_ops {
63 void (*affinst_standby)(unsigned int power_state);
64 int (*affinst_on)(unsigned long mpidr,
65 unsigned long sec_entrypoint,
66 unsigned int afflvl,
67 unsigned int state);
68 void (*affinst_off)(unsigned int afflvl, unsigned int state);
69 void (*affinst_suspend)(unsigned long sec_entrypoint,
70 unsigned int afflvl,
71 unsigned int state);
72 void (*affinst_on_finish)(unsigned int afflvl, unsigned int state);
73 void (*affinst_suspend_finish)(unsigned int afflvl,
74 unsigned int state);
75 void (*system_off)(void) __dead2;
76 void (*system_reset)(void) __dead2;
77 int (*validate_power_state)(unsigned int power_state);
78 int (*validate_ns_entrypoint)(unsigned long ns_entrypoint);
79 unsigned int (*get_sys_suspend_power_state)(void);
80} plat_pm_ops_t;
81
82/*******************************************************************************
83 * Function & Data prototypes to enable compatibility for older platform ports
84 ******************************************************************************/
85int psci_get_suspend_stateid_by_mpidr(unsigned long);
86int psci_get_suspend_stateid(void);
87int psci_get_suspend_powerstate(void);
88unsigned int psci_get_max_phys_off_afflvl(void);
89int psci_get_suspend_afflvl(void);
90
91#endif /* ____ASSEMBLY__ */
92#endif /* __PSCI_COMPAT_H__ */