Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 1 | /* |
Jimmy Brisson | 39f9eee | 2020-08-05 13:44:05 -0500 | [diff] [blame] | 2 | * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
Michael Brandl | afdff3c | 2018-02-22 16:30:30 +0100 | [diff] [blame] | 9 | #include <hikey_def.h> |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 10 | |
| 11 | .globl plat_my_core_pos |
| 12 | .globl platform_mem_init |
| 13 | .globl plat_crash_console_init |
| 14 | .globl plat_crash_console_putc |
Antonio Nino Diaz | 1eb64a1 | 2018-10-17 15:29:34 +0100 | [diff] [blame] | 15 | .globl plat_crash_console_flush |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 16 | .globl plat_report_exception |
| 17 | .globl plat_reset_handler |
| 18 | |
| 19 | func plat_my_core_pos |
| 20 | mrs x0, mpidr_el1 |
| 21 | and x1, x0, #MPIDR_CPU_MASK |
| 22 | and x0, x0, #MPIDR_CLUSTER_MASK |
| 23 | add x0, x1, x0, LSR #6 |
| 24 | ret |
| 25 | endfunc plat_my_core_pos |
| 26 | |
| 27 | /* ----------------------------------------------------- |
| 28 | * void platform_mem_init(void); |
| 29 | * |
| 30 | * We don't need to carry out any memory initialization |
| 31 | * on HIKEY. The Secure RAM is accessible straight away. |
| 32 | * ----------------------------------------------------- |
| 33 | */ |
| 34 | func platform_mem_init |
| 35 | ret |
| 36 | endfunc platform_mem_init |
| 37 | |
| 38 | /* --------------------------------------------- |
| 39 | * int plat_crash_console_init(void) |
| 40 | * Function to initialize the crash console |
| 41 | * without a C Runtime to print crash report. |
| 42 | * Clobber list : x0, x1, x2 |
| 43 | * --------------------------------------------- |
| 44 | */ |
| 45 | func plat_crash_console_init |
| 46 | mov_imm x0, CRASH_CONSOLE_BASE |
| 47 | mov_imm x1, PL011_UART_CLK_IN_HZ |
| 48 | mov_imm x2, PL011_BAUDRATE |
Jerome Forissier | aebe95d | 2018-11-08 10:17:47 +0000 | [diff] [blame] | 49 | b console_pl011_core_init |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 50 | endfunc plat_crash_console_init |
| 51 | |
| 52 | /* --------------------------------------------- |
| 53 | * int plat_crash_console_putc(int c) |
| 54 | * Function to print a character on the crash |
| 55 | * console without a C Runtime. |
| 56 | * Clobber list : x1, x2 |
| 57 | * --------------------------------------------- |
| 58 | */ |
| 59 | func plat_crash_console_putc |
| 60 | mov_imm x1, CRASH_CONSOLE_BASE |
Jerome Forissier | aebe95d | 2018-11-08 10:17:47 +0000 | [diff] [blame] | 61 | b console_pl011_core_putc |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 62 | endfunc plat_crash_console_putc |
| 63 | |
| 64 | /* --------------------------------------------- |
Jimmy Brisson | 39f9eee | 2020-08-05 13:44:05 -0500 | [diff] [blame] | 65 | * void plat_crash_console_flush() |
Antonio Nino Diaz | 1eb64a1 | 2018-10-17 15:29:34 +0100 | [diff] [blame] | 66 | * Function to force a write of all buffered |
| 67 | * data that hasn't been output. |
Jimmy Brisson | 39f9eee | 2020-08-05 13:44:05 -0500 | [diff] [blame] | 68 | * Out : void. |
Antonio Nino Diaz | 1eb64a1 | 2018-10-17 15:29:34 +0100 | [diff] [blame] | 69 | * Clobber list : x0, x1 |
| 70 | * --------------------------------------------- |
| 71 | */ |
| 72 | func plat_crash_console_flush |
| 73 | mov_imm x0, CRASH_CONSOLE_BASE |
Jerome Forissier | aebe95d | 2018-11-08 10:17:47 +0000 | [diff] [blame] | 74 | b console_pl011_core_flush |
Antonio Nino Diaz | 1eb64a1 | 2018-10-17 15:29:34 +0100 | [diff] [blame] | 75 | endfunc plat_crash_console_flush |
| 76 | |
| 77 | /* --------------------------------------------- |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 78 | * void plat_report_exception(unsigned int type) |
| 79 | * Function to report an unhandled exception |
| 80 | * with platform-specific means. |
| 81 | * On HIKEY platform, it updates the LEDs |
| 82 | * to indicate where we are |
| 83 | * --------------------------------------------- |
| 84 | */ |
| 85 | func plat_report_exception |
| 86 | mov x8, x30 |
| 87 | |
| 88 | /* Turn on LED according to x0 (0 -- f) */ |
| 89 | ldr x2, =0xf7020000 |
| 90 | and x1, x0, #1 |
| 91 | str w1, [x2, #4] |
| 92 | and x1, x0, #2 |
| 93 | str w1, [x2, #8] |
| 94 | and x1, x0, #4 |
| 95 | str w1, [x2, #16] |
| 96 | and x1, x0, #8 |
| 97 | str w1, [x2, #32] |
| 98 | |
| 99 | mrs x2, currentel |
| 100 | and x2, x2, #0xc0 |
| 101 | /* Check EL1 */ |
| 102 | cmp x2, #0x04 |
| 103 | beq plat_report_el1 |
| 104 | |
| 105 | adr x4, plat_err_str |
| 106 | bl asm_print_str |
| 107 | |
| 108 | adr x4, esr_el3_str |
| 109 | bl asm_print_str |
| 110 | |
| 111 | mrs x4, esr_el3 |
| 112 | bl asm_print_hex |
| 113 | |
| 114 | adr x4, elr_el3_str |
| 115 | bl asm_print_str |
| 116 | |
| 117 | mrs x4, elr_el3 |
| 118 | bl asm_print_hex |
| 119 | b plat_report_end |
| 120 | |
| 121 | plat_report_el1: |
| 122 | adr x4, plat_err_str |
| 123 | bl asm_print_str |
| 124 | |
| 125 | adr x4, esr_el1_str |
| 126 | bl asm_print_str |
| 127 | |
| 128 | mrs x4, esr_el1 |
| 129 | bl asm_print_hex |
| 130 | |
| 131 | adr x4, elr_el1_str |
| 132 | bl asm_print_str |
| 133 | |
| 134 | mrs x4, elr_el1 |
| 135 | bl asm_print_hex |
| 136 | plat_report_end: |
| 137 | mov x30, x8 |
| 138 | ret |
| 139 | endfunc plat_report_exception |
| 140 | |
| 141 | /* ----------------------------------------------------- |
| 142 | * void plat_reset_handler(void); |
| 143 | * ----------------------------------------------------- |
| 144 | */ |
| 145 | func plat_reset_handler |
| 146 | ret |
| 147 | endfunc plat_reset_handler |
| 148 | |
| 149 | .section .rodata.rev_err_str, "aS" |
| 150 | plat_err_str: |
| 151 | .asciz "\nPlatform exception reporting:" |
| 152 | esr_el3_str: |
| 153 | .asciz "\nESR_EL3: " |
| 154 | elr_el3_str: |
| 155 | .asciz "\nELR_EL3: " |
| 156 | esr_el1_str: |
| 157 | .asciz "\nESR_EL1: " |
| 158 | elr_el1_str: |
| 159 | .asciz "\nELR_EL1: " |