developer | 1033ea1 | 2019-04-10 21:09:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <arch_helpers.h> |
| 9 | #include <common/bl_common.h> |
| 10 | #include <plat/common/common_def.h> |
| 11 | #include <drivers/console.h> |
| 12 | #include <common/debug.h> |
| 13 | #include <drivers/generic_delay_timer.h> |
| 14 | #include <mcucfg.h> |
| 15 | #include <lib/mmio.h> |
| 16 | #include <mtk_plat_common.h> |
| 17 | #include <plat_debug.h> |
| 18 | #include <plat_private.h> |
| 19 | #include <platform_def.h> |
| 20 | #include <scu.h> |
| 21 | #include <drivers/ti/uart/uart_16550.h> |
| 22 | |
| 23 | static entry_point_info_t bl32_ep_info; |
| 24 | static entry_point_info_t bl33_ep_info; |
| 25 | |
| 26 | static void platform_setup_cpu(void) |
| 27 | { |
| 28 | mmio_write_32((uintptr_t)&mt8183_mcucfg->mp0_rw_rsvd0, 0x00000001); |
| 29 | |
| 30 | VERBOSE("addr of cci_adb400_dcm_config: 0x%x\n", |
| 31 | mmio_read_32((uintptr_t)&mt8183_mcucfg->cci_adb400_dcm_config)); |
| 32 | VERBOSE("addr of sync_dcm_config: 0x%x\n", |
| 33 | mmio_read_32((uintptr_t)&mt8183_mcucfg->sync_dcm_config)); |
| 34 | |
| 35 | VERBOSE("mp0_spmc: 0x%x\n", |
| 36 | mmio_read_32((uintptr_t)&mt8183_mcucfg->mp0_cputop_spmc_ctl)); |
| 37 | VERBOSE("mp1_spmc: 0x%x\n", |
| 38 | mmio_read_32((uintptr_t)&mt8183_mcucfg->mp1_cputop_spmc_ctl)); |
| 39 | } |
| 40 | |
| 41 | /******************************************************************************* |
| 42 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 43 | * the security state specified. BL33 corresponds to the non-secure image type |
| 44 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 45 | * if the image does not exist. |
| 46 | ******************************************************************************/ |
| 47 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 48 | { |
| 49 | entry_point_info_t *next_image_info; |
| 50 | |
| 51 | next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; |
| 52 | |
| 53 | /* None of the images on this platform can have 0x0 as the entrypoint */ |
| 54 | if (next_image_info->pc) |
| 55 | return next_image_info; |
| 56 | else |
| 57 | return NULL; |
| 58 | } |
| 59 | |
| 60 | /******************************************************************************* |
| 61 | * Perform any BL31 early platform setup. Here is an opportunity to copy |
| 62 | * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they |
| 63 | * are lost (potentially). This needs to be done before the MMU is initialized |
| 64 | * so that the memory layout can be used while creating page tables. |
| 65 | * BL2 has flushed this information to memory, so we are guaranteed to pick up |
| 66 | * good data. |
| 67 | ******************************************************************************/ |
| 68 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 69 | u_register_t arg2, u_register_t arg3) |
| 70 | { |
| 71 | struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0; |
| 72 | |
| 73 | static console_16550_t console; |
| 74 | console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); |
| 75 | |
| 76 | NOTICE("MT8183 bl31_setup\n"); |
| 77 | |
| 78 | assert(arg_from_bl2 != NULL); |
| 79 | assert(arg_from_bl2->h.type == PARAM_BL31); |
| 80 | assert(arg_from_bl2->h.version >= VERSION_1); |
| 81 | |
| 82 | bl32_ep_info = *arg_from_bl2->bl32_ep_info; |
| 83 | bl33_ep_info = *arg_from_bl2->bl33_ep_info; |
| 84 | } |
| 85 | |
| 86 | |
| 87 | /******************************************************************************* |
| 88 | * Perform any BL31 platform setup code |
| 89 | ******************************************************************************/ |
| 90 | void bl31_platform_setup(void) |
| 91 | { |
| 92 | platform_setup_cpu(); |
| 93 | generic_delay_timer_init(); |
| 94 | } |
| 95 | |
| 96 | /******************************************************************************* |
| 97 | * Perform the very early platform specific architectural setup here. At the |
| 98 | * moment this is only intializes the mmu in a quick and dirty way. |
| 99 | ******************************************************************************/ |
| 100 | void bl31_plat_arch_setup(void) |
| 101 | { |
| 102 | enable_scu(read_mpidr()); |
| 103 | |
| 104 | plat_configure_mmu_el3(BL_CODE_BASE, |
| 105 | BL_COHERENT_RAM_END - BL_CODE_BASE, |
| 106 | BL_CODE_BASE, |
| 107 | BL_CODE_END, |
| 108 | BL_COHERENT_RAM_BASE, |
| 109 | BL_COHERENT_RAM_END); |
| 110 | } |