| Saurabh Gorecha | 70389ca | 2020-04-22 21:31:24 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef QTISECLIB_DEFS_H |
| 8 | #define QTISECLIB_DEFS_H |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | #ifndef u_register_t |
| 13 | typedef uintptr_t u_register_t; |
| 14 | #endif |
| 15 | |
| 16 | /* |
| 17 | * Different Log Level supported in qtiseclib. |
| 18 | * TODO: Currently no filtering done on QTISECLIB logs. |
| 19 | */ |
| 20 | #define QTISECLIB_LOG_LEVEL_NONE 0 |
| 21 | #define QTISECLIB_LOG_LEVEL_ERROR 10 |
| 22 | #define QTISECLIB_LOG_LEVEL_NOTICE 20 |
| 23 | #define QTISECLIB_LOG_LEVEL_WARNING 30 |
| 24 | #define QTISECLIB_LOG_LEVEL_INFO 40 |
| 25 | #define QTISECLIB_LOG_LEVEL_VERBOSE 50 |
| 26 | |
| 27 | #define QTI_GICV3_IRM_PE 0 |
| 28 | #define QTI_GICV3_IRM_ANY 1 |
| 29 | |
| 30 | /* Common interrupt number/ID defs. */ |
| 31 | #define QTISECLIB_INT_ID_RESET_SGI (0xf) |
| 32 | #define QTISECLIB_INT_ID_CPU_WAKEUP_SGI (0x8) |
| 33 | |
| 34 | #define QTISECLIB_INT_INVALID_INT_NUM (0xFFFFFFFFU) |
| 35 | |
| 36 | typedef struct qtiseclib_cb_spinlock { |
| 37 | volatile uint32_t lock; |
| 38 | } qtiseclib_cb_spinlock_t; |
| 39 | |
| 40 | #if QTI_SDI_BUILD |
| 41 | /* External CPU Dump Structure - 64 bit EL */ |
| 42 | typedef struct { |
| 43 | uint64_t x0; |
| 44 | uint64_t x1; |
| 45 | uint64_t x2; |
| 46 | uint64_t x3; |
| 47 | uint64_t x4; |
| 48 | uint64_t x5; |
| 49 | uint64_t x6; |
| 50 | uint64_t x7; |
| 51 | uint64_t x8; |
| 52 | uint64_t x9; |
| 53 | uint64_t x10; |
| 54 | uint64_t x11; |
| 55 | uint64_t x12; |
| 56 | uint64_t x13; |
| 57 | uint64_t x14; |
| 58 | uint64_t x15; |
| 59 | uint64_t x16; |
| 60 | uint64_t x17; |
| 61 | uint64_t x18; |
| 62 | uint64_t x19; |
| 63 | uint64_t x20; |
| 64 | uint64_t x21; |
| 65 | uint64_t x22; |
| 66 | uint64_t x23; |
| 67 | uint64_t x24; |
| 68 | uint64_t x25; |
| 69 | uint64_t x26; |
| 70 | uint64_t x27; |
| 71 | uint64_t x28; |
| 72 | uint64_t x29; |
| 73 | uint64_t x30; |
| 74 | uint64_t pc; |
| 75 | uint64_t currentEL; |
| 76 | uint64_t sp_el3; |
| 77 | uint64_t elr_el3; |
| 78 | uint64_t spsr_el3; |
| 79 | uint64_t sp_el2; |
| 80 | uint64_t elr_el2; |
| 81 | uint64_t spsr_el2; |
| 82 | uint64_t sp_el1; |
| 83 | uint64_t elr_el1; |
| 84 | uint64_t spsr_el1; |
| 85 | uint64_t sp_el0; |
| 86 | uint64_t __reserved1; |
| 87 | uint64_t __reserved2; |
| 88 | uint64_t __reserved3; |
| 89 | uint64_t __reserved4; |
| 90 | uint64_t __reserved5; |
| 91 | uint64_t __reserved6; |
| 92 | uint64_t __reserved7; |
| 93 | uint64_t __reserved8; |
| 94 | } qtiseclib_dbg_a64_ctxt_regs_type; |
| 95 | |
| 96 | typedef enum qtiseclib_mmap_attr_s { |
| 97 | QTISECLIB_MAP_NS_RO_XN_DATA = 1, |
| 98 | QTISECLIB_MAP_RW_XN_NC_DATA = 2, |
| 99 | QTISECLIB_MAP_RW_XN_DATA = 3, |
| 100 | } qtiseclib_mmap_attr_t; |
| 101 | |
| 102 | #endif /* QTI_SDI_BUILD */ |
| 103 | |
| 104 | #endif /* QTISECLIB_DEFS_H */ |