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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathewa0fedc42016-06-16 14:52:04 +01002 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Sandrine Bailleux27866d82013-10-25 15:33:39 +01007#ifndef __GIC_V3_H__
8#define __GIC_V3_H__
9
Soby Mathew3ddc9722015-10-26 14:32:09 +000010/******************************************************************************
11 * THIS DRIVER IS DEPRECATED. For GICv2 systems, use the driver in gicv2.h
12 * and for GICv3 systems, use the driver in gicv3.h.
13 *****************************************************************************/
14#if ERROR_DEPRECATED
15#error " The legacy ARM GIC driver is deprecated."
16#endif
17
Achin Gupta4f6ad662013-10-25 09:08:21 +010018#include <mmio.h>
Dan Handley930ee2e2014-04-17 17:48:52 +010019#include <stdint.h>
Soby Mathewa0fedc42016-06-16 14:52:04 +010020#include <types.h>
Dan Handley930ee2e2014-04-17 17:48:52 +010021
22
23/* GICv3 Re-distributor interface registers & shifts */
24#define GICR_PCPUBASE_SHIFT 0x11
25#define GICR_TYPER 0x08
26#define GICR_WAKER 0x14
Achin Gupta4f6ad662013-10-25 09:08:21 +010027
Dan Handley930ee2e2014-04-17 17:48:52 +010028/* GICR_WAKER bit definitions */
Antonio Nino Diazf94e40d2017-09-14 15:57:44 +010029#define WAKER_CA (U(1) << 2)
30#define WAKER_PS (U(1) << 1)
Dan Handley930ee2e2014-04-17 17:48:52 +010031
32/* GICR_TYPER bit definitions */
33#define GICR_TYPER_AFF_SHIFT 32
34#define GICR_TYPER_AFF_MASK 0xffffffff
Antonio Nino Diazf94e40d2017-09-14 15:57:44 +010035#define GICR_TYPER_LAST (U(1) << 4)
Dan Handley930ee2e2014-04-17 17:48:52 +010036
37/* GICv3 ICC_SRE register bit definitions*/
Antonio Nino Diazf94e40d2017-09-14 15:57:44 +010038#define ICC_SRE_EN (U(1) << 3)
39#define ICC_SRE_SRE (U(1) << 0)
Dan Handley930ee2e2014-04-17 17:48:52 +010040
41/*******************************************************************************
42 * GICv3 defintions
43 ******************************************************************************/
Harry Liebeleaec5902013-12-12 13:00:29 +000044#define GICV3_AFFLVL_MASK 0xff
45#define GICV3_AFF0_SHIFT 0
46#define GICV3_AFF1_SHIFT 8
47#define GICV3_AFF2_SHIFT 16
48#define GICV3_AFF3_SHIFT 24
49#define GICV3_AFFINITY_MASK 0xffffffff
50
Dan Handley930ee2e2014-04-17 17:48:52 +010051/*******************************************************************************
52 * Function prototypes
53 ******************************************************************************/
Soby Mathewa0fedc42016-06-16 14:52:04 +010054uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr);
Harry Liebeleaec5902013-12-12 13:00:29 +000055
Achin Gupta4f6ad662013-10-25 09:08:21 +010056/*******************************************************************************
Sandrine Bailleux27866d82013-10-25 15:33:39 +010057 * GIC Redistributor interface accessors
Achin Gupta4f6ad662013-10-25 09:08:21 +010058 ******************************************************************************/
Harry Liebeleaec5902013-12-12 13:00:29 +000059static inline uint32_t gicr_read_waker(uintptr_t base)
Achin Gupta4f6ad662013-10-25 09:08:21 +010060{
61 return mmio_read_32(base + GICR_WAKER);
62}
63
Harry Liebeleaec5902013-12-12 13:00:29 +000064static inline void gicr_write_waker(uintptr_t base, uint32_t val)
Achin Gupta4f6ad662013-10-25 09:08:21 +010065{
66 mmio_write_32(base + GICR_WAKER, val);
Achin Gupta4f6ad662013-10-25 09:08:21 +010067}
Sandrine Bailleux27866d82013-10-25 15:33:39 +010068
Harry Liebeleaec5902013-12-12 13:00:29 +000069static inline uint64_t gicr_read_typer(uintptr_t base)
70{
71 return mmio_read_64(base + GICR_TYPER);
72}
73
74
Sandrine Bailleux27866d82013-10-25 15:33:39 +010075#endif /* __GIC_V3_H__ */