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David Cunadoce88eee2017-10-20 11:30:57 +01001/*
Max Shvetsovc4502772021-03-22 11:59:37 +00002 * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
David Cunadoce88eee2017-10-20 11:30:57 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <stdbool.h>
8
David Cunadoce88eee2017-10-20 11:30:57 +01009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <lib/el3_runtime/pubsub.h>
12#include <lib/extensions/sve.h>
David Cunadoce88eee2017-10-20 11:30:57 +010013
Max Shvetsovc4502772021-03-22 11:59:37 +000014/*
15 * Converts SVE vector size restriction in bytes to LEN according to ZCR_EL3 documentation.
16 * VECTOR_SIZE = (LEN+1) * 128
17 */
18#define CONVERT_SVE_LENGTH(x) (((x / 128) - 1))
19
20static bool sve_supported(void)
David Cunadoce88eee2017-10-20 11:30:57 +010021{
22 uint64_t features;
23
24 features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT;
Antonio Nino Diaz033b4bb2018-10-25 16:52:26 +010025 return (features & ID_AA64PFR0_SVE_MASK) == 1U;
Dimitris Papastamos5e8cd792018-02-19 14:52:19 +000026}
David Cunadoce88eee2017-10-20 11:30:57 +010027
Max Shvetsovc4502772021-03-22 11:59:37 +000028void sve_enable(cpu_context_t *context)
David Cunadoce88eee2017-10-20 11:30:57 +010029{
Arunachalam Ganapathycac7d162021-07-08 09:35:57 +010030 u_register_t cptr_el3;
31
Max Shvetsovc4502772021-03-22 11:59:37 +000032 if (!sve_supported()) {
Dimitris Papastamos5e8cd792018-02-19 14:52:19 +000033 return;
Max Shvetsovc4502772021-03-22 11:59:37 +000034 }
Dimitris Papastamos5e8cd792018-02-19 14:52:19 +000035
Arunachalam Ganapathycac7d162021-07-08 09:35:57 +010036 cptr_el3 = read_ctx_reg(get_el3state_ctx(context), CTX_CPTR_EL3);
David Cunadoce88eee2017-10-20 11:30:57 +010037
Max Shvetsovc4502772021-03-22 11:59:37 +000038 /* Enable access to SVE functionality for all ELs. */
39 cptr_el3 = (cptr_el3 | CPTR_EZ_BIT) & ~(TFP_BIT);
40 write_ctx_reg(get_el3state_ctx(context), CTX_CPTR_EL3, cptr_el3);
David Cunadoce88eee2017-10-20 11:30:57 +010041
Max Shvetsovc4502772021-03-22 11:59:37 +000042 /* Restrict maximum SVE vector length (SVE_VECTOR_LENGTH+1) * 128. */
43 write_ctx_reg(get_el3state_ctx(context), CTX_ZCR_EL3,
44 (ZCR_EL3_LEN_MASK & CONVERT_SVE_LENGTH(512)));
David Cunadoce88eee2017-10-20 11:30:57 +010045}