blob: bcda74114ebb6f50d2e2283d070ed86da89bb746 [file] [log] [blame]
Joel Huttona7c46872018-01-10 16:06:07 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <arch.h>
7#include <asm_macros.S>
8#include <bl_common.h>
9#include <cortex_helios.h>
10#include <cpu_macros.S>
11#include <debug.h>
12#include <plat_macros.S>
13
14func cortex_helios_cpu_pwr_dwn
15 mrs x0, CORTEX_HELIOS_CPUPWRCTLR_EL1
16 orr x0, x0, #CORTEX_HELIOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
17 msr CORTEX_HELIOS_CPUPWRCTLR_EL1, x0
18 isb
19 ret
20endfunc cortex_helios_cpu_pwr_dwn
21
22.section .rodata.cortex_helios_regs, "aS"
23cortex_helios_regs: /* The ascii list of register names to be reported */
24 .asciz "cpuectlr_el1", ""
25
26func cortex_helios_cpu_reg_dump
27 adr x6, cortex_helios_regs
28 mrs x8, CORTEX_HELIOS_ECTLR_EL1
29 ret
30endfunc cortex_helios_cpu_reg_dump
31
32declare_cpu_ops cortex_helios, CORTEX_HELIOS_MIDR, \
33 CPU_NO_RESET_FUNC, \
34 cortex_helios_cpu_pwr_dwn