Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 1 | /* |
Masahiro Yamada | e30ec7f | 2020-01-17 13:46:38 +0900 | [diff] [blame] | 2 | * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Masahiro Yamada | ca971b5 | 2020-02-03 19:45:16 +0900 | [diff] [blame^] | 7 | #include <errno.h> |
| 8 | |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 9 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | |
Antonio Nino Diaz | de97ff3 | 2019-01-25 13:28:38 +0000 | [diff] [blame] | 11 | #include <common/bl_common.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 12 | #include <lib/xlat_tables/xlat_mmu_helpers.h> |
Masahiro Yamada | ca971b5 | 2020-02-03 19:45:16 +0900 | [diff] [blame^] | 13 | #include <plat/common/platform.h> |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 14 | |
| 15 | #include "../uniphier.h" |
| 16 | |
Masahiro Yamada | ca971b5 | 2020-02-03 19:45:16 +0900 | [diff] [blame^] | 17 | static unsigned int uniphier_soc = UNIPHIER_SOC_UNKNOWN; |
| 18 | |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 19 | void tsp_early_platform_setup(void) |
| 20 | { |
Masahiro Yamada | ca971b5 | 2020-02-03 19:45:16 +0900 | [diff] [blame^] | 21 | uniphier_soc = uniphier_get_soc_id(); |
| 22 | if (uniphier_soc == UNIPHIER_SOC_UNKNOWN) |
| 23 | plat_error_handler(-ENOTSUP); |
| 24 | |
| 25 | uniphier_console_setup(uniphier_soc); |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 26 | } |
| 27 | |
| 28 | void tsp_platform_setup(void) |
| 29 | { |
| 30 | } |
| 31 | |
| 32 | void tsp_plat_arch_setup(void) |
| 33 | { |
Masahiro Yamada | e30ec7f | 2020-01-17 13:46:38 +0900 | [diff] [blame] | 34 | uniphier_mmap_setup(); |
Masahiro Yamada | d9cf7bb | 2017-05-15 13:00:00 +0900 | [diff] [blame] | 35 | enable_mmu_el1(0); |
| 36 | } |