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Sona Mathew7fe03522022-11-18 18:05:38 -06001/*
2 * Copyright (c) 2023, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef ERRATA_CPUSPEC_H
8#define ERRATA_CPUSPEC_H
9
10#include <stdint.h>
11#include <arch_helpers.h>
12
13#if __aarch64__
14#include <cortex_a35.h>
15#include <cortex_a510.h>
Arvind Ram Prakashb975aad2023-12-15 11:34:52 -060016#include <cortex_a520.h>
Sona Mathew7fe03522022-11-18 18:05:38 -060017#include <cortex_a53.h>
18#include <cortex_a57.h>
19#include <cortex_a55.h>
20#include <cortex_a710.h>
21#include <cortex_a72.h>
22#include <cortex_a73.h>
23#include <cortex_a75.h>
24#include <cortex_a76.h>
25#include <cortex_a77.h>
26#include <cortex_a78.h>
27#include <cortex_a78_ae.h>
28#include <cortex_a78c.h>
Harrison Mutaie5004c12023-05-23 17:28:03 +010029#include <cortex_a715.h>
Sona Mathew7fe03522022-11-18 18:05:38 -060030#include <cortex_x1.h>
31#include <cortex_x2.h>
Sona Mathew0592cfc2023-09-06 15:32:12 -050032#include <cortex_x3.h>
Sona Mathew7fe03522022-11-18 18:05:38 -060033#include <neoverse_n1.h>
34#include <neoverse_n2.h>
35#include <neoverse_v1.h>
36#include <neoverse_v2.h>
37#else
38#include <cortex_a15.h>
39#include <cortex_a17.h>
40#include <cortex_a57.h>
41#include <cortex_a9.h>
42#endif
43
Arvind Ram Prakash465f93b2023-07-05 17:24:23 -050044#define MAX_ERRATA_ENTRIES 32
Sona Mathew7fe03522022-11-18 18:05:38 -060045
46#define ERRATA_LIST_END (MAX_ERRATA_ENTRIES - 1)
47
Sona Mathewc5b386d2023-03-14 16:50:36 -050048/* Default values for unused memory in the array */
49#define UNDEF_ERRATA {UINT_MAX, UCHAR_MAX, UCHAR_MAX, false, false}
Sona Mathew7fe03522022-11-18 18:05:38 -060050
51#define EXTRACT_PARTNUM(x) ((x >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
52
53#define RXPX_RANGE(x, y, z) (((x >= y) && (x <= z)) ? true : false)
54
55/*
56 * CPU specific values for errata handling
57 */
Sona Mathew7fe03522022-11-18 18:05:38 -060058struct em_cpu{
59 unsigned int em_errata_id;
60 unsigned char em_rxpx_lo; /* lowest revision of errata applicable for the cpu */
61 unsigned char em_rxpx_hi; /* highest revision of errata applicable for the cpu */
62 bool errata_enabled; /* indicate if errata enabled */
Sona Mathew5a4c9fc2023-03-14 14:02:03 -050063 /* flag to indicate if errata query is based out of non-arm interconnect */
64 bool non_arm_interconnect;
Sona Mathew7fe03522022-11-18 18:05:38 -060065};
66
67struct em_cpu_list{
68 /* field to hold cpu specific part number defined in midr reg */
69 unsigned long cpu_partnumber;
70 struct em_cpu cpu_errata_list[MAX_ERRATA_ENTRIES];
71};
72
73int32_t verify_errata_implemented(uint32_t errata_id, uint32_t forward_flag);
74#endif /* ERRATA_CPUSPEC_H */