sah01 | 066afc2 | 2021-11-18 10:04:27 +0000 | [diff] [blame] | 1 | /* |
Chandni Cherukuri | c873efc | 2023-02-16 20:22:32 +0530 | [diff] [blame^] | 2 | * Copyright (c) 2021-2023, Arm Limited. All rights reserved. |
sah01 | 066afc2 | 2021-11-18 10:04:27 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch_helpers.h> |
| 8 | #include <common/debug.h> |
| 9 | #include <common/desc_image_load.h> |
| 10 | #include <drivers/arm/css/sds.h> |
| 11 | #include <libfdt.h> |
| 12 | |
| 13 | #include "morello_def.h" |
| 14 | #include <plat/arm/common/plat_arm.h> |
| 15 | #include <plat/common/platform.h> |
| 16 | |
| 17 | #ifdef TARGET_PLATFORM_FVP |
| 18 | /* |
| 19 | * Platform information structure stored in SDS. |
| 20 | * This structure holds information about platform's DDR |
| 21 | * size which is an information about multichip setup |
| 22 | * - Local DDR size in bytes, DDR memory in main board |
| 23 | */ |
| 24 | struct morello_plat_info { |
| 25 | uint64_t local_ddr_size; |
| 26 | } __packed; |
| 27 | #else |
| 28 | /* |
| 29 | * Platform information structure stored in SDS. |
| 30 | * This structure holds information about platform's DDR |
| 31 | * size which is an information about multichip setup |
| 32 | * - Local DDR size in bytes, DDR memory in main board |
| 33 | * - Remote DDR size in bytes, DDR memory in remote board |
| 34 | * - remote_chip_count |
| 35 | * - multichip mode |
| 36 | * - scc configuration |
Chandni Cherukuri | c873efc | 2023-02-16 20:22:32 +0530 | [diff] [blame^] | 37 | * - silicon revision |
sah01 | 066afc2 | 2021-11-18 10:04:27 +0000 | [diff] [blame] | 38 | */ |
| 39 | struct morello_plat_info { |
| 40 | uint64_t local_ddr_size; |
| 41 | uint64_t remote_ddr_size; |
| 42 | uint8_t remote_chip_count; |
| 43 | bool multichip_mode; |
| 44 | uint32_t scc_config; |
Chandni Cherukuri | c873efc | 2023-02-16 20:22:32 +0530 | [diff] [blame^] | 45 | uint32_t silicon_revision; |
sah01 | 066afc2 | 2021-11-18 10:04:27 +0000 | [diff] [blame] | 46 | } __packed; |
| 47 | #endif |
| 48 | |
| 49 | /* In client mode, a part of the DDR memory is reserved for Tag bits. |
| 50 | * Calculate the usable memory size after subtracting the Tag memory. |
| 51 | */ |
| 52 | static inline uint64_t get_mem_client_mode(uint64_t size) |
| 53 | { |
| 54 | return (size - (size / 128ULL)); |
| 55 | } |
| 56 | |
| 57 | /******************************************************************************* |
| 58 | * This function inserts Platform information via device tree nodes as, |
| 59 | * platform-info { |
| 60 | * local-ddr-size = <0x0 0x0>; |
| 61 | *#ifdef TARGET_PLATFORM_SOC |
| 62 | * remote-ddr-size = <0x0 0x0>; |
| 63 | * remote-chip-count = <0x0>; |
| 64 | * multichip-mode = <0x0>; |
| 65 | * scc-config = <0x0>; |
| 66 | *#endif |
| 67 | * }; |
| 68 | ******************************************************************************/ |
| 69 | static int plat_morello_append_config_node(struct morello_plat_info *plat_info) |
| 70 | { |
| 71 | bl_mem_params_node_t *mem_params; |
| 72 | void *fdt; |
| 73 | int nodeoffset, err; |
| 74 | uint64_t usable_mem_size; |
| 75 | |
| 76 | usable_mem_size = plat_info->local_ddr_size; |
| 77 | |
| 78 | mem_params = get_bl_mem_params_node(NT_FW_CONFIG_ID); |
| 79 | if (mem_params == NULL) { |
| 80 | ERROR("NT_FW CONFIG base address is NULL\n"); |
| 81 | return -1; |
| 82 | } |
| 83 | |
| 84 | fdt = (void *)(mem_params->image_info.image_base); |
| 85 | |
| 86 | /* Check the validity of the fdt */ |
| 87 | if (fdt_check_header(fdt) != 0) { |
| 88 | ERROR("Invalid NT_FW_CONFIG DTB passed\n"); |
| 89 | return -1; |
| 90 | } |
| 91 | |
| 92 | nodeoffset = fdt_subnode_offset(fdt, 0, "platform-info"); |
| 93 | if (nodeoffset < 0) { |
| 94 | ERROR("NT_FW_CONFIG: Failed to get platform-info node offset\n"); |
| 95 | return -1; |
| 96 | } |
| 97 | |
| 98 | #ifdef TARGET_PLATFORM_SOC |
| 99 | err = fdt_setprop_u64(fdt, nodeoffset, "remote-ddr-size", |
| 100 | plat_info->remote_ddr_size); |
| 101 | if (err < 0) { |
| 102 | ERROR("NT_FW_CONFIG: Failed to set remote-ddr-size\n"); |
| 103 | return -1; |
| 104 | } |
| 105 | |
| 106 | err = fdt_setprop_u32(fdt, nodeoffset, "remote-chip-count", |
| 107 | plat_info->remote_chip_count); |
| 108 | if (err < 0) { |
| 109 | ERROR("NT_FW_CONFIG: Failed to set remote-chip-count\n"); |
| 110 | return -1; |
| 111 | } |
| 112 | |
| 113 | err = fdt_setprop_u32(fdt, nodeoffset, "multichip-mode", |
| 114 | plat_info->multichip_mode); |
| 115 | if (err < 0) { |
| 116 | ERROR("NT_FW_CONFIG: Failed to set multichip-mode\n"); |
| 117 | return -1; |
| 118 | } |
| 119 | |
| 120 | err = fdt_setprop_u32(fdt, nodeoffset, "scc-config", |
| 121 | plat_info->scc_config); |
| 122 | if (err < 0) { |
| 123 | ERROR("NT_FW_CONFIG: Failed to set scc-config\n"); |
| 124 | return -1; |
| 125 | } |
| 126 | |
| 127 | if (plat_info->scc_config & MORELLO_SCC_CLIENT_MODE_MASK) { |
| 128 | usable_mem_size = get_mem_client_mode(plat_info->local_ddr_size); |
| 129 | } |
| 130 | #endif |
| 131 | err = fdt_setprop_u64(fdt, nodeoffset, "local-ddr-size", |
| 132 | usable_mem_size); |
| 133 | if (err < 0) { |
| 134 | ERROR("NT_FW_CONFIG: Failed to set local-ddr-size\n"); |
| 135 | return -1; |
| 136 | } |
| 137 | |
| 138 | flush_dcache_range((uintptr_t)fdt, mem_params->image_info.image_size); |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | /******************************************************************************* |
| 144 | * This function returns the list of executable images. |
| 145 | ******************************************************************************/ |
| 146 | bl_params_t *plat_get_next_bl_params(void) |
| 147 | { |
| 148 | int ret; |
| 149 | struct morello_plat_info plat_info; |
| 150 | |
| 151 | ret = sds_init(); |
| 152 | if (ret != SDS_OK) { |
| 153 | ERROR("SDS initialization failed. ret:%d\n", ret); |
| 154 | panic(); |
| 155 | } |
| 156 | |
| 157 | ret = sds_struct_read(MORELLO_SDS_PLATFORM_INFO_STRUCT_ID, |
| 158 | MORELLO_SDS_PLATFORM_INFO_OFFSET, |
| 159 | &plat_info, |
| 160 | MORELLO_SDS_PLATFORM_INFO_SIZE, |
| 161 | SDS_ACCESS_MODE_NON_CACHED); |
| 162 | if (ret != SDS_OK) { |
| 163 | ERROR("Error getting platform info from SDS. ret:%d\n", ret); |
| 164 | panic(); |
| 165 | } |
| 166 | |
| 167 | /* Validate plat_info SDS */ |
| 168 | #ifdef TARGET_PLATFORM_FVP |
| 169 | if (plat_info.local_ddr_size == 0U) { |
| 170 | #else |
| 171 | if ((plat_info.local_ddr_size == 0U) |
| 172 | || (plat_info.local_ddr_size > MORELLO_MAX_DDR_CAPACITY) |
| 173 | || (plat_info.remote_ddr_size > MORELLO_MAX_DDR_CAPACITY) |
| 174 | || (plat_info.remote_chip_count > MORELLO_MAX_REMOTE_CHIP_COUNT) |
| 175 | ){ |
| 176 | #endif |
| 177 | ERROR("platform info SDS is corrupted\n"); |
| 178 | panic(); |
| 179 | } |
| 180 | |
| 181 | ret = plat_morello_append_config_node(&plat_info); |
| 182 | if (ret != 0) { |
| 183 | panic(); |
| 184 | } |
| 185 | |
| 186 | return arm_get_next_bl_params(); |
| 187 | } |