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git01.mediatek.com / filogic / atf / c82ce46eb9d308490ccacdc0e1f56c35dc09e21f / . / plat / xilinx / zynqmp / pm_service / pm_api_pinctrl.h
blob: 01f79dbaa6a64ada1749417e44c0f3d83bf06bd8 [file] [log] [blame]
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800[diff] [blame]1/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/*
8 * ZynqMP system level PM-API functions for pin control.
9 */
10
11#ifndef _PM_API_PINCTRL_H_
12#define _PM_API_PINCTRL_H_
13
14#include "pm_common.h"
15
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]16#define FUNCTION_NAME_LEN 16
17#define GROUPS_PAYLOAD_LEN 12
18#define NUM_GROUPS_PER_RESP 6
19#define END_OF_FUNCTION "END_OF_FUNCTION"
20#define END_OF_GROUPS -1
21#define PINCTRL_GRP_RESERVED -2
22
23enum pinctrl_fids {
24 PINCTRL_FUNC_CAN0,
25 PINCTRL_FUNC_CAN1,
26 PINCTRL_FUNC_ETHERNET0,
27 PINCTRL_FUNC_ETHERNET1,
28 PINCTRL_FUNC_ETHERNET2,
29 PINCTRL_FUNC_ETHERNET3,
30 PINCTRL_FUNC_GEMTSU0,
31 PINCTRL_FUNC_GPIO0,
32 PINCTRL_FUNC_I2C0,
33 PINCTRL_FUNC_I2C1,
34 PINCTRL_FUNC_MDIO0,
35 PINCTRL_FUNC_MDIO1,
36 PINCTRL_FUNC_MDIO2,
37 PINCTRL_FUNC_MDIO3,
38 PINCTRL_FUNC_QSPI0,
39 PINCTRL_FUNC_QSPI_FBCLK,
40 PINCTRL_FUNC_QSPI_SS,
41 PINCTRL_FUNC_SPI0,
42 PINCTRL_FUNC_SPI1,
43 PINCTRL_FUNC_SPI0_SS,
44 PINCTRL_FUNC_SPI1_SS,
45 PINCTRL_FUNC_SDIO0,
46 PINCTRL_FUNC_SDIO0_PC,
47 PINCTRL_FUNC_SDIO0_CD,
48 PINCTRL_FUNC_SDIO0_WP,
49 PINCTRL_FUNC_SDIO1,
50 PINCTRL_FUNC_SDIO1_PC,
51 PINCTRL_FUNC_SDIO1_CD,
52 PINCTRL_FUNC_SDIO1_WP,
53 PINCTRL_FUNC_NAND0,
54 PINCTRL_FUNC_NAND0_CE,
55 PINCTRL_FUNC_NAND0_RB,
56 PINCTRL_FUNC_NAND0_DQS,
57 PINCTRL_FUNC_TTC0_CLK,
58 PINCTRL_FUNC_TTC0_WAV,
59 PINCTRL_FUNC_TTC1_CLK,
60 PINCTRL_FUNC_TTC1_WAV,
61 PINCTRL_FUNC_TTC2_CLK,
62 PINCTRL_FUNC_TTC2_WAV,
63 PINCTRL_FUNC_TTC3_CLK,
64 PINCTRL_FUNC_TTC3_WAV,
65 PINCTRL_FUNC_UART0,
66 PINCTRL_FUNC_UART1,
67 PINCTRL_FUNC_USB0,
68 PINCTRL_FUNC_USB1,
69 PINCTRL_FUNC_SWDT0_CLK,
70 PINCTRL_FUNC_SWDT0_RST,
71 PINCTRL_FUNC_SWDT1_CLK,
72 PINCTRL_FUNC_SWDT1_RST,
73 PINCTRL_FUNC_PMU0,
74 PINCTRL_FUNC_PCIE0,
75 PINCTRL_FUNC_CSU0,
76 PINCTRL_FUNC_DPAUX0,
77 PINCTRL_FUNC_PJTAG0,
78 PINCTRL_FUNC_TRACE0,
79 PINCTRL_FUNC_TRACE0_CLK,
80 PINCTRL_FUNC_TESTSCAN0,
81 MAX_FUNCTION,
82};
83
84enum pinctrl_pin {
85 PINCTRL_PIN_0,
86 PINCTRL_PIN_1,
87 PINCTRL_PIN_2,
88 PINCTRL_PIN_3,
89 PINCTRL_PIN_4,
90 PINCTRL_PIN_5,
91 PINCTRL_PIN_6,
92 PINCTRL_PIN_7,
93 PINCTRL_PIN_8,
94 PINCTRL_PIN_9,
95 PINCTRL_PIN_10,
96 PINCTRL_PIN_11,
97 PINCTRL_PIN_12,
98 PINCTRL_PIN_13,
99 PINCTRL_PIN_14,
100 PINCTRL_PIN_15,
101 PINCTRL_PIN_16,
102 PINCTRL_PIN_17,
103 PINCTRL_PIN_18,
104 PINCTRL_PIN_19,
105 PINCTRL_PIN_20,
106 PINCTRL_PIN_21,
107 PINCTRL_PIN_22,
108 PINCTRL_PIN_23,
109 PINCTRL_PIN_24,
110 PINCTRL_PIN_25,
111 PINCTRL_PIN_26,
112 PINCTRL_PIN_27,
113 PINCTRL_PIN_28,
114 PINCTRL_PIN_29,
115 PINCTRL_PIN_30,
116 PINCTRL_PIN_31,
117 PINCTRL_PIN_32,
118 PINCTRL_PIN_33,
119 PINCTRL_PIN_34,
120 PINCTRL_PIN_35,
121 PINCTRL_PIN_36,
122 PINCTRL_PIN_37,
123 PINCTRL_PIN_38,
124 PINCTRL_PIN_39,
125 PINCTRL_PIN_40,
126 PINCTRL_PIN_41,
127 PINCTRL_PIN_42,
128 PINCTRL_PIN_43,
129 PINCTRL_PIN_44,
130 PINCTRL_PIN_45,
131 PINCTRL_PIN_46,
132 PINCTRL_PIN_47,
133 PINCTRL_PIN_48,
134 PINCTRL_PIN_49,
135 PINCTRL_PIN_50,
136 PINCTRL_PIN_51,
137 PINCTRL_PIN_52,
138 PINCTRL_PIN_53,
139 PINCTRL_PIN_54,
140 PINCTRL_PIN_55,
141 PINCTRL_PIN_56,
142 PINCTRL_PIN_57,
143 PINCTRL_PIN_58,
144 PINCTRL_PIN_59,
145 PINCTRL_PIN_60,
146 PINCTRL_PIN_61,
147 PINCTRL_PIN_62,
148 PINCTRL_PIN_63,
149 PINCTRL_PIN_64,
150 PINCTRL_PIN_65,
151 PINCTRL_PIN_66,
152 PINCTRL_PIN_67,
153 PINCTRL_PIN_68,
154 PINCTRL_PIN_69,
155 PINCTRL_PIN_70,
156 PINCTRL_PIN_71,
157 PINCTRL_PIN_72,
158 PINCTRL_PIN_73,
159 PINCTRL_PIN_74,
160 PINCTRL_PIN_75,
161 PINCTRL_PIN_76,
162 PINCTRL_PIN_77,
163 MAX_PIN,
164};
165
166enum pinctrl_group_ids {
167 PINCTRL_GRP_ETHERNET0_0,
168 PINCTRL_GRP_ETHERNET1_0,
169 PINCTRL_GRP_ETHERNET2_0,
170 PINCTRL_GRP_ETHERNET3_0,
171 PINCTRL_GRP_GEMTSU0_0,
172 PINCTRL_GRP_GEMTSU0_1,
173 PINCTRL_GRP_GEMTSU0_2,
174 PINCTRL_GRP_MDIO0_0,
175 PINCTRL_GRP_MDIO1_0,
176 PINCTRL_GRP_MDIO1_1,
177 PINCTRL_GRP_MDIO2_0,
178 PINCTRL_GRP_MDIO3_0,
179 PINCTRL_GRP_QSPI0_0,
180 PINCTRL_GRP_QSPI_SS,
181 PINCTRL_GRP_QSPI_FBCLK,
182 PINCTRL_GRP_SPI0_0,
183 PINCTRL_GRP_SPI0_0_SS0,
184 PINCTRL_GRP_SPI0_0_SS1,
185 PINCTRL_GRP_SPI0_0_SS2,
186 PINCTRL_GRP_SPI0_1,
187 PINCTRL_GRP_SPI0_1_SS0,
188 PINCTRL_GRP_SPI0_1_SS1,
189 PINCTRL_GRP_SPI0_1_SS2,
190 PINCTRL_GRP_SPI0_2,
191 PINCTRL_GRP_SPI0_2_SS0,
192 PINCTRL_GRP_SPI0_2_SS1,
193 PINCTRL_GRP_SPI0_2_SS2,
194 PINCTRL_GRP_SPI0_3,
195 PINCTRL_GRP_SPI0_3_SS0,
196 PINCTRL_GRP_SPI0_3_SS1,
197 PINCTRL_GRP_SPI0_3_SS2,
198 PINCTRL_GRP_SPI0_4,
199 PINCTRL_GRP_SPI0_4_SS0,
200 PINCTRL_GRP_SPI0_4_SS1,
201 PINCTRL_GRP_SPI0_4_SS2,
202 PINCTRL_GRP_SPI0_5,
203 PINCTRL_GRP_SPI0_5_SS0,
204 PINCTRL_GRP_SPI0_5_SS1,
205 PINCTRL_GRP_SPI0_5_SS2,
206 PINCTRL_GRP_SPI1_0,
207 PINCTRL_GRP_SPI1_0_SS0,
208 PINCTRL_GRP_SPI1_0_SS1,
209 PINCTRL_GRP_SPI1_0_SS2,
210 PINCTRL_GRP_SPI1_1,
211 PINCTRL_GRP_SPI1_1_SS0,
212 PINCTRL_GRP_SPI1_1_SS1,
213 PINCTRL_GRP_SPI1_1_SS2,
214 PINCTRL_GRP_SPI1_2,
215 PINCTRL_GRP_SPI1_2_SS0,
216 PINCTRL_GRP_SPI1_2_SS1,
217 PINCTRL_GRP_SPI1_2_SS2,
218 PINCTRL_GRP_SPI1_3,
219 PINCTRL_GRP_SPI1_3_SS0,
220 PINCTRL_GRP_SPI1_3_SS1,
221 PINCTRL_GRP_SPI1_3_SS2,
222 PINCTRL_GRP_SPI1_4,
223 PINCTRL_GRP_SPI1_4_SS0,
224 PINCTRL_GRP_SPI1_4_SS1,
225 PINCTRL_GRP_SPI1_4_SS2,
226 PINCTRL_GRP_SPI1_5,
227 PINCTRL_GRP_SPI1_5_SS0,
228 PINCTRL_GRP_SPI1_5_SS1,
229 PINCTRL_GRP_SPI1_5_SS2,
230 PINCTRL_GRP_SDIO0_0,
Rajan Vajac82ce462018-02-22 01:06:52 -0800[diff] [blame^]231 PINCTRL_GRP_SDIO0_1,
232 PINCTRL_GRP_SDIO0_2,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]233 PINCTRL_GRP_SDIO0_4BIT_0_0,
234 PINCTRL_GRP_SDIO0_4BIT_0_1,
Rajan Vajac82ce462018-02-22 01:06:52 -0800[diff] [blame^]235 PINCTRL_GRP_SDIO0_4BIT_1_0,
236 PINCTRL_GRP_SDIO0_4BIT_1_1,
237 PINCTRL_GRP_SDIO0_4BIT_2_0,
238 PINCTRL_GRP_SDIO0_4BIT_2_1,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]239 PINCTRL_GRP_SDIO0_1BIT_0_0,
240 PINCTRL_GRP_SDIO0_1BIT_0_1,
241 PINCTRL_GRP_SDIO0_1BIT_0_2,
242 PINCTRL_GRP_SDIO0_1BIT_0_3,
243 PINCTRL_GRP_SDIO0_1BIT_0_4,
244 PINCTRL_GRP_SDIO0_1BIT_0_5,
245 PINCTRL_GRP_SDIO0_1BIT_0_6,
246 PINCTRL_GRP_SDIO0_1BIT_0_7,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]247 PINCTRL_GRP_SDIO0_1BIT_1_0,
248 PINCTRL_GRP_SDIO0_1BIT_1_1,
249 PINCTRL_GRP_SDIO0_1BIT_1_2,
250 PINCTRL_GRP_SDIO0_1BIT_1_3,
251 PINCTRL_GRP_SDIO0_1BIT_1_4,
252 PINCTRL_GRP_SDIO0_1BIT_1_5,
253 PINCTRL_GRP_SDIO0_1BIT_1_6,
254 PINCTRL_GRP_SDIO0_1BIT_1_7,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]255 PINCTRL_GRP_SDIO0_1BIT_2_0,
256 PINCTRL_GRP_SDIO0_1BIT_2_1,
257 PINCTRL_GRP_SDIO0_1BIT_2_2,
258 PINCTRL_GRP_SDIO0_1BIT_2_3,
259 PINCTRL_GRP_SDIO0_1BIT_2_4,
260 PINCTRL_GRP_SDIO0_1BIT_2_5,
261 PINCTRL_GRP_SDIO0_1BIT_2_6,
262 PINCTRL_GRP_SDIO0_1BIT_2_7,
Rajan Vajac82ce462018-02-22 01:06:52 -0800[diff] [blame^]263 PINCTRL_GRP_SDIO0_0_PC,
264 PINCTRL_GRP_SDIO0_0_CD,
265 PINCTRL_GRP_SDIO0_0_WP,
266 PINCTRL_GRP_SDIO0_1_PC,
267 PINCTRL_GRP_SDIO0_1_CD,
268 PINCTRL_GRP_SDIO0_1_WP,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]269 PINCTRL_GRP_SDIO0_2_PC,
270 PINCTRL_GRP_SDIO0_2_CD,
271 PINCTRL_GRP_SDIO0_2_WP,
272 PINCTRL_GRP_SDIO1_0,
273 PINCTRL_GRP_SDIO1_4BIT_0_0,
274 PINCTRL_GRP_SDIO1_4BIT_0_1,
Rajan Vajac82ce462018-02-22 01:06:52 -0800[diff] [blame^]275 PINCTRL_GRP_SDIO1_4BIT_1_0,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]276 PINCTRL_GRP_SDIO1_1BIT_0_0,
277 PINCTRL_GRP_SDIO1_1BIT_0_1,
278 PINCTRL_GRP_SDIO1_1BIT_0_2,
279 PINCTRL_GRP_SDIO1_1BIT_0_3,
280 PINCTRL_GRP_SDIO1_1BIT_0_4,
281 PINCTRL_GRP_SDIO1_1BIT_0_5,
282 PINCTRL_GRP_SDIO1_1BIT_0_6,
283 PINCTRL_GRP_SDIO1_1BIT_0_7,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]284 PINCTRL_GRP_SDIO1_1BIT_1_0,
285 PINCTRL_GRP_SDIO1_1BIT_1_1,
286 PINCTRL_GRP_SDIO1_1BIT_1_2,
287 PINCTRL_GRP_SDIO1_1BIT_1_3,
Rajan Vajac82ce462018-02-22 01:06:52 -0800[diff] [blame^]288 PINCTRL_GRP_SDIO1_0_PC,
289 PINCTRL_GRP_SDIO1_0_CD,
290 PINCTRL_GRP_SDIO1_0_WP,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]291 PINCTRL_GRP_SDIO1_1_PC,
292 PINCTRL_GRP_SDIO1_1_CD,
293 PINCTRL_GRP_SDIO1_1_WP,
294 PINCTRL_GRP_NAND0_0,
295 PINCTRL_GRP_NAND0_0_CE,
296 PINCTRL_GRP_NAND0_0_RB,
297 PINCTRL_GRP_NAND0_0_DQS,
298 PINCTRL_GRP_NAND0_1_CE,
299 PINCTRL_GRP_NAND0_1_RB,
300 PINCTRL_GRP_NAND0_1_DQS,
301 PINCTRL_GRP_CAN0_0,
302 PINCTRL_GRP_CAN0_1,
303 PINCTRL_GRP_CAN0_2,
304 PINCTRL_GRP_CAN0_3,
305 PINCTRL_GRP_CAN0_4,
306 PINCTRL_GRP_CAN0_5,
307 PINCTRL_GRP_CAN0_6,
308 PINCTRL_GRP_CAN0_7,
309 PINCTRL_GRP_CAN0_8,
310 PINCTRL_GRP_CAN0_9,
311 PINCTRL_GRP_CAN0_10,
312 PINCTRL_GRP_CAN0_11,
313 PINCTRL_GRP_CAN0_12,
314 PINCTRL_GRP_CAN0_13,
315 PINCTRL_GRP_CAN0_14,
316 PINCTRL_GRP_CAN0_15,
317 PINCTRL_GRP_CAN0_16,
318 PINCTRL_GRP_CAN0_17,
319 PINCTRL_GRP_CAN0_18,
320 PINCTRL_GRP_CAN1_0,
321 PINCTRL_GRP_CAN1_1,
322 PINCTRL_GRP_CAN1_2,
323 PINCTRL_GRP_CAN1_3,
324 PINCTRL_GRP_CAN1_4,
325 PINCTRL_GRP_CAN1_5,
326 PINCTRL_GRP_CAN1_6,
327 PINCTRL_GRP_CAN1_7,
328 PINCTRL_GRP_CAN1_8,
329 PINCTRL_GRP_CAN1_9,
330 PINCTRL_GRP_CAN1_10,
331 PINCTRL_GRP_CAN1_11,
332 PINCTRL_GRP_CAN1_12,
333 PINCTRL_GRP_CAN1_13,
334 PINCTRL_GRP_CAN1_14,
335 PINCTRL_GRP_CAN1_15,
336 PINCTRL_GRP_CAN1_16,
337 PINCTRL_GRP_CAN1_17,
338 PINCTRL_GRP_CAN1_18,
339 PINCTRL_GRP_CAN1_19,
340 PINCTRL_GRP_UART0_0,
341 PINCTRL_GRP_UART0_1,
342 PINCTRL_GRP_UART0_2,
343 PINCTRL_GRP_UART0_3,
344 PINCTRL_GRP_UART0_4,
345 PINCTRL_GRP_UART0_5,
346 PINCTRL_GRP_UART0_6,
347 PINCTRL_GRP_UART0_7,
348 PINCTRL_GRP_UART0_8,
349 PINCTRL_GRP_UART0_9,
350 PINCTRL_GRP_UART0_10,
351 PINCTRL_GRP_UART0_11,
352 PINCTRL_GRP_UART0_12,
353 PINCTRL_GRP_UART0_13,
354 PINCTRL_GRP_UART0_14,
355 PINCTRL_GRP_UART0_15,
356 PINCTRL_GRP_UART0_16,
357 PINCTRL_GRP_UART0_17,
358 PINCTRL_GRP_UART0_18,
359 PINCTRL_GRP_UART1_0,
360 PINCTRL_GRP_UART1_1,
361 PINCTRL_GRP_UART1_2,
362 PINCTRL_GRP_UART1_3,
363 PINCTRL_GRP_UART1_4,
364 PINCTRL_GRP_UART1_5,
365 PINCTRL_GRP_UART1_6,
366 PINCTRL_GRP_UART1_7,
367 PINCTRL_GRP_UART1_8,
368 PINCTRL_GRP_UART1_9,
369 PINCTRL_GRP_UART1_10,
370 PINCTRL_GRP_UART1_11,
371 PINCTRL_GRP_UART1_12,
372 PINCTRL_GRP_UART1_13,
373 PINCTRL_GRP_UART1_14,
374 PINCTRL_GRP_UART1_15,
375 PINCTRL_GRP_UART1_16,
376 PINCTRL_GRP_UART1_17,
377 PINCTRL_GRP_UART1_18,
378 PINCTRL_GRP_I2C0_0,
379 PINCTRL_GRP_I2C0_1,
380 PINCTRL_GRP_I2C0_2,
381 PINCTRL_GRP_I2C0_3,
382 PINCTRL_GRP_I2C0_4,
383 PINCTRL_GRP_I2C0_5,
384 PINCTRL_GRP_I2C0_6,
385 PINCTRL_GRP_I2C0_7,
386 PINCTRL_GRP_I2C0_8,
387 PINCTRL_GRP_I2C0_9,
388 PINCTRL_GRP_I2C0_10,
389 PINCTRL_GRP_I2C0_11,
390 PINCTRL_GRP_I2C0_12,
391 PINCTRL_GRP_I2C0_13,
392 PINCTRL_GRP_I2C0_14,
393 PINCTRL_GRP_I2C0_15,
394 PINCTRL_GRP_I2C0_16,
395 PINCTRL_GRP_I2C0_17,
396 PINCTRL_GRP_I2C0_18,
397 PINCTRL_GRP_I2C1_0,
398 PINCTRL_GRP_I2C1_1,
399 PINCTRL_GRP_I2C1_2,
400 PINCTRL_GRP_I2C1_3,
401 PINCTRL_GRP_I2C1_4,
402 PINCTRL_GRP_I2C1_5,
403 PINCTRL_GRP_I2C1_6,
404 PINCTRL_GRP_I2C1_7,
405 PINCTRL_GRP_I2C1_8,
406 PINCTRL_GRP_I2C1_9,
407 PINCTRL_GRP_I2C1_10,
408 PINCTRL_GRP_I2C1_11,
409 PINCTRL_GRP_I2C1_12,
410 PINCTRL_GRP_I2C1_13,
411 PINCTRL_GRP_I2C1_14,
412 PINCTRL_GRP_I2C1_15,
413 PINCTRL_GRP_I2C1_16,
414 PINCTRL_GRP_I2C1_17,
415 PINCTRL_GRP_I2C1_18,
416 PINCTRL_GRP_I2C1_19,
417 PINCTRL_GRP_TTC0_0_CLK,
418 PINCTRL_GRP_TTC0_0_WAV,
419 PINCTRL_GRP_TTC0_1_CLK,
420 PINCTRL_GRP_TTC0_1_WAV,
421 PINCTRL_GRP_TTC0_2_CLK,
422 PINCTRL_GRP_TTC0_2_WAV,
423 PINCTRL_GRP_TTC0_3_CLK,
424 PINCTRL_GRP_TTC0_3_WAV,
425 PINCTRL_GRP_TTC0_4_CLK,
426 PINCTRL_GRP_TTC0_4_WAV,
427 PINCTRL_GRP_TTC0_5_CLK,
428 PINCTRL_GRP_TTC0_5_WAV,
429 PINCTRL_GRP_TTC0_6_CLK,
430 PINCTRL_GRP_TTC0_6_WAV,
431 PINCTRL_GRP_TTC0_7_CLK,
432 PINCTRL_GRP_TTC0_7_WAV,
433 PINCTRL_GRP_TTC0_8_CLK,
434 PINCTRL_GRP_TTC0_8_WAV,
435 PINCTRL_GRP_TTC1_0_CLK,
436 PINCTRL_GRP_TTC1_0_WAV,
437 PINCTRL_GRP_TTC1_1_CLK,
438 PINCTRL_GRP_TTC1_1_WAV,
439 PINCTRL_GRP_TTC1_2_CLK,
440 PINCTRL_GRP_TTC1_2_WAV,
441 PINCTRL_GRP_TTC1_3_CLK,
442 PINCTRL_GRP_TTC1_3_WAV,
443 PINCTRL_GRP_TTC1_4_CLK,
444 PINCTRL_GRP_TTC1_4_WAV,
445 PINCTRL_GRP_TTC1_5_CLK,
446 PINCTRL_GRP_TTC1_5_WAV,
447 PINCTRL_GRP_TTC1_6_CLK,
448 PINCTRL_GRP_TTC1_6_WAV,
449 PINCTRL_GRP_TTC1_7_CLK,
450 PINCTRL_GRP_TTC1_7_WAV,
451 PINCTRL_GRP_TTC1_8_CLK,
452 PINCTRL_GRP_TTC1_8_WAV,
453 PINCTRL_GRP_TTC2_0_CLK,
454 PINCTRL_GRP_TTC2_0_WAV,
455 PINCTRL_GRP_TTC2_1_CLK,
456 PINCTRL_GRP_TTC2_1_WAV,
457 PINCTRL_GRP_TTC2_2_CLK,
458 PINCTRL_GRP_TTC2_2_WAV,
459 PINCTRL_GRP_TTC2_3_CLK,
460 PINCTRL_GRP_TTC2_3_WAV,
461 PINCTRL_GRP_TTC2_4_CLK,
462 PINCTRL_GRP_TTC2_4_WAV,
463 PINCTRL_GRP_TTC2_5_CLK,
464 PINCTRL_GRP_TTC2_5_WAV,
465 PINCTRL_GRP_TTC2_6_CLK,
466 PINCTRL_GRP_TTC2_6_WAV,
467 PINCTRL_GRP_TTC2_7_CLK,
468 PINCTRL_GRP_TTC2_7_WAV,
469 PINCTRL_GRP_TTC2_8_CLK,
470 PINCTRL_GRP_TTC2_8_WAV,
471 PINCTRL_GRP_TTC3_0_CLK,
472 PINCTRL_GRP_TTC3_0_WAV,
473 PINCTRL_GRP_TTC3_1_CLK,
474 PINCTRL_GRP_TTC3_1_WAV,
475 PINCTRL_GRP_TTC3_2_CLK,
476 PINCTRL_GRP_TTC3_2_WAV,
477 PINCTRL_GRP_TTC3_3_CLK,
478 PINCTRL_GRP_TTC3_3_WAV,
479 PINCTRL_GRP_TTC3_4_CLK,
480 PINCTRL_GRP_TTC3_4_WAV,
481 PINCTRL_GRP_TTC3_5_CLK,
482 PINCTRL_GRP_TTC3_5_WAV,
483 PINCTRL_GRP_TTC3_6_CLK,
484 PINCTRL_GRP_TTC3_6_WAV,
485 PINCTRL_GRP_TTC3_7_CLK,
486 PINCTRL_GRP_TTC3_7_WAV,
487 PINCTRL_GRP_TTC3_8_CLK,
488 PINCTRL_GRP_TTC3_8_WAV,
489 PINCTRL_GRP_SWDT0_0_CLK,
490 PINCTRL_GRP_SWDT0_0_RST,
491 PINCTRL_GRP_SWDT0_1_CLK,
492 PINCTRL_GRP_SWDT0_1_RST,
493 PINCTRL_GRP_SWDT0_2_CLK,
494 PINCTRL_GRP_SWDT0_2_RST,
495 PINCTRL_GRP_SWDT0_3_CLK,
496 PINCTRL_GRP_SWDT0_3_RST,
497 PINCTRL_GRP_SWDT0_4_CLK,
498 PINCTRL_GRP_SWDT0_4_RST,
499 PINCTRL_GRP_SWDT0_5_CLK,
500 PINCTRL_GRP_SWDT0_5_RST,
501 PINCTRL_GRP_SWDT0_6_CLK,
502 PINCTRL_GRP_SWDT0_6_RST,
503 PINCTRL_GRP_SWDT0_7_CLK,
504 PINCTRL_GRP_SWDT0_7_RST,
505 PINCTRL_GRP_SWDT0_8_CLK,
506 PINCTRL_GRP_SWDT0_8_RST,
507 PINCTRL_GRP_SWDT0_9_CLK,
508 PINCTRL_GRP_SWDT0_9_RST,
509 PINCTRL_GRP_SWDT0_10_CLK,
510 PINCTRL_GRP_SWDT0_10_RST,
511 PINCTRL_GRP_SWDT0_11_CLK,
512 PINCTRL_GRP_SWDT0_11_RST,
513 PINCTRL_GRP_SWDT0_12_CLK,
514 PINCTRL_GRP_SWDT0_12_RST,
515 PINCTRL_GRP_SWDT1_0_CLK,
516 PINCTRL_GRP_SWDT1_0_RST,
517 PINCTRL_GRP_SWDT1_1_CLK,
518 PINCTRL_GRP_SWDT1_1_RST,
519 PINCTRL_GRP_SWDT1_2_CLK,
520 PINCTRL_GRP_SWDT1_2_RST,
521 PINCTRL_GRP_SWDT1_3_CLK,
522 PINCTRL_GRP_SWDT1_3_RST,
523 PINCTRL_GRP_SWDT1_4_CLK,
524 PINCTRL_GRP_SWDT1_4_RST,
525 PINCTRL_GRP_SWDT1_5_CLK,
526 PINCTRL_GRP_SWDT1_5_RST,
527 PINCTRL_GRP_SWDT1_6_CLK,
528 PINCTRL_GRP_SWDT1_6_RST,
529 PINCTRL_GRP_SWDT1_7_CLK,
530 PINCTRL_GRP_SWDT1_7_RST,
531 PINCTRL_GRP_SWDT1_8_CLK,
532 PINCTRL_GRP_SWDT1_8_RST,
533 PINCTRL_GRP_SWDT1_9_CLK,
534 PINCTRL_GRP_SWDT1_9_RST,
535 PINCTRL_GRP_SWDT1_10_CLK,
536 PINCTRL_GRP_SWDT1_10_RST,
537 PINCTRL_GRP_SWDT1_11_CLK,
538 PINCTRL_GRP_SWDT1_11_RST,
539 PINCTRL_GRP_SWDT1_12_CLK,
540 PINCTRL_GRP_SWDT1_12_RST,
541 PINCTRL_GRP_GPIO0_0,
542 PINCTRL_GRP_GPIO0_1,
543 PINCTRL_GRP_GPIO0_2,
544 PINCTRL_GRP_GPIO0_3,
545 PINCTRL_GRP_GPIO0_4,
546 PINCTRL_GRP_GPIO0_5,
547 PINCTRL_GRP_GPIO0_6,
548 PINCTRL_GRP_GPIO0_7,
549 PINCTRL_GRP_GPIO0_8,
550 PINCTRL_GRP_GPIO0_9,
551 PINCTRL_GRP_GPIO0_10,
552 PINCTRL_GRP_GPIO0_11,
553 PINCTRL_GRP_GPIO0_12,
554 PINCTRL_GRP_GPIO0_13,
555 PINCTRL_GRP_GPIO0_14,
556 PINCTRL_GRP_GPIO0_15,
557 PINCTRL_GRP_GPIO0_16,
558 PINCTRL_GRP_GPIO0_17,
559 PINCTRL_GRP_GPIO0_18,
560 PINCTRL_GRP_GPIO0_19,
561 PINCTRL_GRP_GPIO0_20,
562 PINCTRL_GRP_GPIO0_21,
563 PINCTRL_GRP_GPIO0_22,
564 PINCTRL_GRP_GPIO0_23,
565 PINCTRL_GRP_GPIO0_24,
566 PINCTRL_GRP_GPIO0_25,
567 PINCTRL_GRP_GPIO0_26,
568 PINCTRL_GRP_GPIO0_27,
569 PINCTRL_GRP_GPIO0_28,
570 PINCTRL_GRP_GPIO0_29,
571 PINCTRL_GRP_GPIO0_30,
572 PINCTRL_GRP_GPIO0_31,
573 PINCTRL_GRP_GPIO0_32,
574 PINCTRL_GRP_GPIO0_33,
575 PINCTRL_GRP_GPIO0_34,
576 PINCTRL_GRP_GPIO0_35,
577 PINCTRL_GRP_GPIO0_36,
578 PINCTRL_GRP_GPIO0_37,
579 PINCTRL_GRP_GPIO0_38,
580 PINCTRL_GRP_GPIO0_39,
581 PINCTRL_GRP_GPIO0_40,
582 PINCTRL_GRP_GPIO0_41,
583 PINCTRL_GRP_GPIO0_42,
584 PINCTRL_GRP_GPIO0_43,
585 PINCTRL_GRP_GPIO0_44,
586 PINCTRL_GRP_GPIO0_45,
587 PINCTRL_GRP_GPIO0_46,
588 PINCTRL_GRP_GPIO0_47,
589 PINCTRL_GRP_GPIO0_48,
590 PINCTRL_GRP_GPIO0_49,
591 PINCTRL_GRP_GPIO0_50,
592 PINCTRL_GRP_GPIO0_51,
593 PINCTRL_GRP_GPIO0_52,
594 PINCTRL_GRP_GPIO0_53,
595 PINCTRL_GRP_GPIO0_54,
596 PINCTRL_GRP_GPIO0_55,
597 PINCTRL_GRP_GPIO0_56,
598 PINCTRL_GRP_GPIO0_57,
599 PINCTRL_GRP_GPIO0_58,
600 PINCTRL_GRP_GPIO0_59,
601 PINCTRL_GRP_GPIO0_60,
602 PINCTRL_GRP_GPIO0_61,
603 PINCTRL_GRP_GPIO0_62,
604 PINCTRL_GRP_GPIO0_63,
605 PINCTRL_GRP_GPIO0_64,
606 PINCTRL_GRP_GPIO0_65,
607 PINCTRL_GRP_GPIO0_66,
608 PINCTRL_GRP_GPIO0_67,
609 PINCTRL_GRP_GPIO0_68,
610 PINCTRL_GRP_GPIO0_69,
611 PINCTRL_GRP_GPIO0_70,
612 PINCTRL_GRP_GPIO0_71,
613 PINCTRL_GRP_GPIO0_72,
614 PINCTRL_GRP_GPIO0_73,
615 PINCTRL_GRP_GPIO0_74,
616 PINCTRL_GRP_GPIO0_75,
617 PINCTRL_GRP_GPIO0_76,
618 PINCTRL_GRP_GPIO0_77,
619 PINCTRL_GRP_USB0_0,
620 PINCTRL_GRP_USB1_0,
621 PINCTRL_GRP_PMU0_0,
622 PINCTRL_GRP_PMU0_1,
623 PINCTRL_GRP_PMU0_2,
624 PINCTRL_GRP_PMU0_3,
625 PINCTRL_GRP_PMU0_4,
626 PINCTRL_GRP_PMU0_5,
627 PINCTRL_GRP_PMU0_6,
628 PINCTRL_GRP_PMU0_7,
629 PINCTRL_GRP_PMU0_8,
630 PINCTRL_GRP_PMU0_9,
631 PINCTRL_GRP_PMU0_10,
632 PINCTRL_GRP_PMU0_11,
633 PINCTRL_GRP_PCIE0_0,
634 PINCTRL_GRP_PCIE0_1,
635 PINCTRL_GRP_PCIE0_2,
636 PINCTRL_GRP_PCIE0_3,
637 PINCTRL_GRP_PCIE0_4,
638 PINCTRL_GRP_PCIE0_5,
639 PINCTRL_GRP_PCIE0_6,
640 PINCTRL_GRP_PCIE0_7,
641 PINCTRL_GRP_CSU0_0,
642 PINCTRL_GRP_CSU0_1,
643 PINCTRL_GRP_CSU0_2,
644 PINCTRL_GRP_CSU0_3,
645 PINCTRL_GRP_CSU0_4,
646 PINCTRL_GRP_CSU0_5,
647 PINCTRL_GRP_CSU0_6,
648 PINCTRL_GRP_CSU0_7,
649 PINCTRL_GRP_CSU0_8,
650 PINCTRL_GRP_CSU0_9,
651 PINCTRL_GRP_CSU0_10,
652 PINCTRL_GRP_CSU0_11,
653 PINCTRL_GRP_DPAUX0_0,
654 PINCTRL_GRP_DPAUX0_1,
655 PINCTRL_GRP_DPAUX0_2,
656 PINCTRL_GRP_DPAUX0_3,
657 PINCTRL_GRP_PJTAG0_0,
658 PINCTRL_GRP_PJTAG0_1,
659 PINCTRL_GRP_PJTAG0_2,
660 PINCTRL_GRP_PJTAG0_3,
661 PINCTRL_GRP_PJTAG0_4,
662 PINCTRL_GRP_PJTAG0_5,
663 PINCTRL_GRP_TRACE0_0,
664 PINCTRL_GRP_TRACE0_0_CLK,
665 PINCTRL_GRP_TRACE0_1,
666 PINCTRL_GRP_TRACE0_1_CLK,
667 PINCTRL_GRP_TRACE0_2,
668 PINCTRL_GRP_TRACE0_2_CLK,
669 PINCTRL_GRP_TESTSCAN0_0,
670};
671
Rajan Vaja5e139e72018-01-17 02:39:22 -0800[diff] [blame]672enum pm_pinctrl_config_param {
673 PINCTRL_CONFIG_SLEW_RATE,
674 PINCTRL_CONFIG_BIAS_STATUS,
675 PINCTRL_CONFIG_PULL_CTRL,
676 PINCTRL_CONFIG_SCHMITT_CMOS,
677 PINCTRL_CONFIG_DRIVE_STRENGTH,
678 PINCTRL_CONFIG_VOLTAGE_STATUS,
679 PINCTRL_CONFIG_MAX,
680};
681
682enum pm_pinctrl_slew_rate {
683 PINCTRL_SLEW_RATE_FAST,
684 PINCTRL_SLEW_RATE_SLOW,
685};
686
687enum pm_pinctrl_bias_status {
688 PINCTRL_BIAS_DISABLE,
689 PINCTRL_BIAS_ENABLE,
690};
691
692enum pm_pinctrl_pull_ctrl {
693 PINCTRL_BIAS_PULL_DOWN,
694 PINCTRL_BIAS_PULL_UP,
695};
696
697enum pm_pinctrl_schmitt_cmos {
698 PINCTRL_INPUT_TYPE_CMOS,
699 PINCTRL_INPUT_TYPE_SCHMITT,
700};
701
702enum pm_pinctrl_drive_strength {
703 PINCTRL_DRIVE_STRENGTH_2MA,
704 PINCTRL_DRIVE_STRENGTH_4MA,
705 PINCTRL_DRIVE_STRENGTH_8MA,
706 PINCTRL_DRIVE_STRENGTH_12MA,
707};
708
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800[diff] [blame]709enum pm_ret_status pm_api_pinctrl_set_function(unsigned int pin,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]710 unsigned int id);
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800[diff] [blame]711enum pm_ret_status pm_api_pinctrl_get_function(unsigned int pin,
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]712 unsigned int *id);
Rajan Vaja5e139e72018-01-17 02:39:22 -0800[diff] [blame]713enum pm_ret_status pm_api_pinctrl_set_config(unsigned int pin,
714 unsigned int param,
715 unsigned int value);
716enum pm_ret_status pm_api_pinctrl_get_config(unsigned int pin,
717 unsigned int param,
718 unsigned int *value);
Rajan Vajad5dd8362018-01-30 04:16:31 -0800[diff] [blame]719enum pm_ret_status pm_api_pinctrl_get_function_name(unsigned int fid,
720 char *name);
721enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid,
722 unsigned int index,
723 uint16_t *groups);
724enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin,
725 unsigned int index,
726 uint16_t *groups);
727enum pm_ret_status pm_api_pinctrl_get_num_pins(unsigned int *npins);
728enum pm_ret_status pm_api_pinctrl_get_num_functions(unsigned int *nfuncs);
729enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid,
730 unsigned int *ngroups);
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800[diff] [blame]731#endif /* _PM_API_PINCTRL_H_ */