| Pankaj Gupta | 988bbb2 | 2020-12-09 14:02:40 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2018-2020 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | #ifndef BL31_DATA_H |
| 9 | #define BL31_DATA_H |
| 10 | |
| 11 | #define SECURE_DATA_BASE NXP_OCRAM_ADDR |
| 12 | #define SECURE_DATA_SIZE NXP_OCRAM_SIZE |
| 13 | #define SECURE_DATA_TOP (SECURE_DATA_BASE + SECURE_DATA_SIZE) |
| 14 | #define SMC_REGION_SIZE 0x80 |
| 15 | #define SMC_GLBL_BASE (SECURE_DATA_TOP - SMC_REGION_SIZE) |
| 16 | #define BC_PSCI_DATA_SIZE 0xC0 |
| 17 | #define BC_PSCI_BASE (SMC_GLBL_BASE - BC_PSCI_DATA_SIZE) |
| 18 | #define SECONDARY_TOP BC_PSCI_BASE |
| 19 | |
| 20 | #define SEC_PSCI_DATA_SIZE 0xC0 |
| 21 | #define SEC_REGION_SIZE SEC_PSCI_DATA_SIZE |
| 22 | |
| 23 | /* SMC global data */ |
| 24 | #define BOOTLOC_OFFSET 0x0 |
| 25 | #define BOOT_SVCS_OSET 0x8 |
| 26 | |
| 27 | /* offset to prefetch disable mask */ |
| 28 | #define PREFETCH_DIS_OFFSET 0x10 |
| 29 | /* must reference last smc global entry */ |
| 30 | #define LAST_SMC_GLBL_OFFSET 0x18 |
| 31 | |
| 32 | #define SMC_TASK_OFFSET 0xC |
| 33 | #define TSK_START_OFFSET 0x0 |
| 34 | #define TSK_DONE_OFFSET 0x4 |
| 35 | #define TSK_CORE_OFFSET 0x8 |
| 36 | #define SMC_TASK1_BASE (SMC_GLBL_BASE + 32) |
| 37 | #define SMC_TASK2_BASE (SMC_TASK1_BASE + SMC_TASK_OFFSET) |
| 38 | #define SMC_TASK3_BASE (SMC_TASK2_BASE + SMC_TASK_OFFSET) |
| 39 | #define SMC_TASK4_BASE (SMC_TASK3_BASE + SMC_TASK_OFFSET) |
| 40 | |
| 41 | /* psci data area offsets */ |
| 42 | #define CORE_STATE_DATA 0x0 |
| 43 | #define SPSR_EL3_DATA 0x8 |
| 44 | #define CNTXT_ID_DATA 0x10 |
| 45 | #define START_ADDR_DATA 0x18 |
| 46 | #define LINK_REG_DATA 0x20 |
| 47 | #define GICC_CTLR_DATA 0x28 |
| 48 | #define ABORT_FLAG_DATA 0x30 |
| 49 | #define SCTLR_DATA 0x38 |
| 50 | #define CPUECTLR_DATA 0x40 |
| 51 | #define AUX_01_DATA 0x48 /* usage defined per SoC */ |
| 52 | #define AUX_02_DATA 0x50 /* usage defined per SoC */ |
| 53 | #define AUX_03_DATA 0x58 /* usage defined per SoC */ |
| 54 | #define AUX_04_DATA 0x60 /* usage defined per SoC */ |
| 55 | #define AUX_05_DATA 0x68 /* usage defined per SoC */ |
| 56 | #define AUX_06_DATA 0x70 /* usage defined per SoC */ |
| 57 | #define AUX_07_DATA 0x78 /* usage defined per SoC */ |
| 58 | #define SCR_EL3_DATA 0x80 |
| 59 | #define HCR_EL2_DATA 0x88 |
| 60 | |
| 61 | #endif /* BL31_DATA_H */ |