Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 7 | # Enable version2 of image loading |
| 8 | LOAD_IMAGE_V2 := 1 |
| 9 | |
Victor Chong | b9a8db2 | 2017-05-28 00:14:25 +0900 | [diff] [blame] | 10 | # On Hikey, the TSP can execute from TZC secure area in DRAM (default) |
| 11 | # or SRAM. |
| 12 | HIKEY_TSP_RAM_LOCATION := dram |
| 13 | ifeq (${HIKEY_TSP_RAM_LOCATION}, dram) |
| 14 | HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID |
| 15 | else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram) |
| 16 | HIKEY_TSP_RAM_LOCATION_ID := HIKEY_SRAM_ID |
| 17 | else |
| 18 | $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value") |
| 19 | endif |
| 20 | |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 21 | CONSOLE_BASE := PL011_UART3_BASE |
| 22 | CRASH_CONSOLE_BASE := PL011_UART3_BASE |
Haojian Zhuang | 934ae71 | 2017-05-24 08:47:49 +0800 | [diff] [blame] | 23 | PLAT_PARTITION_MAX_ENTRIES := 12 |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 24 | PLAT_PL061_MAX_GPIOS := 160 |
| 25 | COLD_BOOT_SINGLE_CPU := 1 |
| 26 | PROGRAMMABLE_RESET_ADDRESS := 1 |
David Cunado | c5b0c0f | 2017-10-31 23:19:21 +0000 | [diff] [blame] | 27 | ENABLE_SVE_FOR_NS := 0 |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 28 | |
| 29 | # Process flags |
Victor Chong | b9a8db2 | 2017-05-28 00:14:25 +0900 | [diff] [blame] | 30 | $(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID)) |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 31 | $(eval $(call add_define,CONSOLE_BASE)) |
| 32 | $(eval $(call add_define,CRASH_CONSOLE_BASE)) |
| 33 | $(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) |
Haojian Zhuang | 934ae71 | 2017-05-24 08:47:49 +0800 | [diff] [blame] | 34 | $(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES)) |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 35 | |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 36 | # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images |
| 37 | # in the FIP if the platform requires. |
| 38 | ifneq ($(BL32_EXTRA1),) |
| 39 | $(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) |
| 40 | endif |
| 41 | ifneq ($(BL32_EXTRA2),) |
| 42 | $(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) |
| 43 | endif |
| 44 | |
Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 45 | ENABLE_PLAT_COMPAT := 0 |
| 46 | |
| 47 | USE_COHERENT_MEM := 1 |
| 48 | |
| 49 | PLAT_INCLUDES := -Iinclude/common/tbbr \ |
| 50 | -Iinclude/drivers/synopsys \ |
| 51 | -Iplat/hisilicon/hikey/include |
| 52 | |
| 53 | PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ |
| 54 | lib/aarch64/xlat_tables.c \ |
| 55 | plat/hisilicon/hikey/aarch64/hikey_common.c |
| 56 | |
| 57 | BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ |
| 58 | drivers/arm/pl061/pl061_gpio.c \ |
| 59 | drivers/arm/sp804/sp804_delay_timer.c \ |
| 60 | drivers/delay_timer/delay_timer.c \ |
| 61 | drivers/gpio/gpio.c \ |
| 62 | drivers/io/io_block.c \ |
| 63 | drivers/io/io_fip.c \ |
| 64 | drivers/io/io_storage.c \ |
| 65 | drivers/emmc/emmc.c \ |
| 66 | drivers/synopsys/emmc/dw_mmc.c \ |
| 67 | lib/cpus/aarch64/cortex_a53.S \ |
| 68 | plat/hisilicon/hikey/aarch64/hikey_helpers.S \ |
| 69 | plat/hisilicon/hikey/hikey_bl1_setup.c \ |
| 70 | plat/hisilicon/hikey/hikey_io_storage.c |
Haojian Zhuang | 934ae71 | 2017-05-24 08:47:49 +0800 | [diff] [blame] | 71 | |
| 72 | BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c \ |
| 73 | drivers/delay_timer/delay_timer.c \ |
| 74 | drivers/io/io_block.c \ |
| 75 | drivers/io/io_fip.c \ |
| 76 | drivers/io/io_storage.c \ |
| 77 | drivers/emmc/emmc.c \ |
| 78 | drivers/synopsys/emmc/dw_mmc.c \ |
| 79 | plat/hisilicon/hikey/aarch64/hikey_helpers.S \ |
| 80 | plat/hisilicon/hikey/hikey_bl2_setup.c \ |
| 81 | plat/hisilicon/hikey/hikey_ddr.c \ |
| 82 | plat/hisilicon/hikey/hikey_io_storage.c \ |
| 83 | plat/hisilicon/hikey/hisi_dvfs.c \ |
| 84 | plat/hisilicon/hikey/hisi_mcu.c |
Haojian Zhuang | 3846f14 | 2017-05-24 08:49:26 +0800 | [diff] [blame] | 85 | |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 86 | ifeq (${LOAD_IMAGE_V2},1) |
| 87 | BL2_SOURCES += plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \ |
| 88 | plat/hisilicon/hikey/hikey_image_load.c \ |
| 89 | common/desc_image_load.c |
Victor Chong | 7d787f5 | 2017-08-16 13:53:56 +0900 | [diff] [blame] | 90 | |
| 91 | ifeq (${SPD},opteed) |
| 92 | BL2_SOURCES += lib/optee/optee_utils.c |
| 93 | endif |
Victor Chong | 2d9a42d | 2017-08-17 15:21:10 +0900 | [diff] [blame] | 94 | endif |
| 95 | |
Haojian Zhuang | 3846f14 | 2017-05-24 08:49:26 +0800 | [diff] [blame] | 96 | HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ |
| 97 | drivers/arm/gic/v2/gicv2_main.c \ |
| 98 | drivers/arm/gic/v2/gicv2_helpers.c \ |
| 99 | plat/common/plat_gicv2.c |
| 100 | |
| 101 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
Leo Yan | d5e2d1a | 2017-05-27 13:17:45 +0800 | [diff] [blame] | 102 | drivers/arm/sp804/sp804_delay_timer.c \ |
| 103 | drivers/delay_timer/delay_timer.c \ |
Haojian Zhuang | 3846f14 | 2017-05-24 08:49:26 +0800 | [diff] [blame] | 104 | lib/cpus/aarch64/cortex_a53.S \ |
| 105 | plat/common/aarch64/plat_psci_common.c \ |
| 106 | plat/hisilicon/hikey/aarch64/hikey_helpers.S \ |
| 107 | plat/hisilicon/hikey/hikey_bl31_setup.c \ |
| 108 | plat/hisilicon/hikey/hikey_pm.c \ |
| 109 | plat/hisilicon/hikey/hikey_topology.c \ |
| 110 | plat/hisilicon/hikey/hisi_ipc.c \ |
| 111 | plat/hisilicon/hikey/hisi_pwrc.c \ |
| 112 | plat/hisilicon/hikey/hisi_pwrc_sram.S \ |
| 113 | ${HIKEY_GIC_SOURCES} |
Vincent Guittot | 492acec | 2017-06-07 10:12:05 +0200 | [diff] [blame] | 114 | ifeq (${ENABLE_PMF}, 1) |
| 115 | BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \ |
| 116 | lib/pmf/pmf_smc.c |
| 117 | endif |
| 118 | |
Haojian Zhuang | 6643083 | 2017-06-30 16:21:54 +0800 | [diff] [blame] | 119 | # Enable workarounds for selected Cortex-A53 errata. |
| 120 | ERRATA_A53_836870 := 1 |
| 121 | ERRATA_A53_843419 := 1 |
| 122 | ERRATA_A53_855873 := 1 |