Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __EMMC_H__ |
| 8 | #define __EMMC_H__ |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | #define EMMC_BLOCK_SIZE 512 |
| 13 | #define EMMC_BLOCK_MASK (EMMC_BLOCK_SIZE - 1) |
| 14 | #define EMMC_BOOT_CLK_RATE (400 * 1000) |
| 15 | |
| 16 | #define EMMC_CMD0 0 |
| 17 | #define EMMC_CMD1 1 |
| 18 | #define EMMC_CMD2 2 |
| 19 | #define EMMC_CMD3 3 |
| 20 | #define EMMC_CMD6 6 |
| 21 | #define EMMC_CMD7 7 |
| 22 | #define EMMC_CMD8 8 |
| 23 | #define EMMC_CMD9 9 |
| 24 | #define EMMC_CMD12 12 |
| 25 | #define EMMC_CMD13 13 |
| 26 | #define EMMC_CMD17 17 |
| 27 | #define EMMC_CMD18 18 |
Haojian Zhuang | bd5cf9c | 2016-08-02 20:51:27 +0800 | [diff] [blame] | 28 | #define EMMC_CMD23 23 |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 29 | #define EMMC_CMD24 24 |
| 30 | #define EMMC_CMD25 25 |
| 31 | #define EMMC_CMD35 35 |
| 32 | #define EMMC_CMD36 36 |
| 33 | #define EMMC_CMD38 38 |
| 34 | |
| 35 | #define OCR_POWERUP (1 << 31) |
| 36 | #define OCR_BYTE_MODE (0 << 29) |
| 37 | #define OCR_SECTOR_MODE (2 << 29) |
| 38 | #define OCR_ACCESS_MODE_MASK (3 << 29) |
| 39 | #define OCR_VDD_MIN_2V7 (0x1ff << 15) |
| 40 | #define OCR_VDD_MIN_2V0 (0x7f << 8) |
| 41 | #define OCR_VDD_MIN_1V7 (1 << 7) |
| 42 | |
| 43 | #define EMMC_RESPONSE_R1 1 |
| 44 | #define EMMC_RESPONSE_R1B 1 |
| 45 | #define EMMC_RESPONSE_R2 4 |
| 46 | #define EMMC_RESPONSE_R3 1 |
| 47 | #define EMMC_RESPONSE_R4 1 |
| 48 | #define EMMC_RESPONSE_R5 1 |
| 49 | |
| 50 | #define EMMC_FIX_RCA 6 /* > 1 */ |
| 51 | #define RCA_SHIFT_OFFSET 16 |
| 52 | |
| 53 | #define CMD_EXTCSD_PARTITION_CONFIG 179 |
| 54 | #define CMD_EXTCSD_BUS_WIDTH 183 |
| 55 | #define CMD_EXTCSD_HS_TIMING 185 |
| 56 | |
| 57 | #define PART_CFG_BOOT_PARTITION1_ENABLE (1 << 3) |
| 58 | #define PART_CFG_PARTITION1_ACCESS (1 << 0) |
| 59 | |
| 60 | /* values in EXT CSD register */ |
| 61 | #define EMMC_BUS_WIDTH_1 0 |
| 62 | #define EMMC_BUS_WIDTH_4 1 |
| 63 | #define EMMC_BUS_WIDTH_8 2 |
| 64 | #define EMMC_BOOT_MODE_BACKWARD (0 << 3) |
| 65 | #define EMMC_BOOT_MODE_HS_TIMING (1 << 3) |
| 66 | #define EMMC_BOOT_MODE_DDR (2 << 3) |
| 67 | |
| 68 | #define EXTCSD_SET_CMD (0 << 24) |
| 69 | #define EXTCSD_SET_BITS (1 << 24) |
| 70 | #define EXTCSD_CLR_BITS (2 << 24) |
| 71 | #define EXTCSD_WRITE_BYTES (3 << 24) |
| 72 | #define EXTCSD_CMD(x) (((x) & 0xff) << 16) |
| 73 | #define EXTCSD_VALUE(x) (((x) & 0xff) << 8) |
| 74 | |
| 75 | #define STATUS_CURRENT_STATE(x) (((x) & 0xf) << 9) |
| 76 | #define STATUS_READY_FOR_DATA (1 << 8) |
| 77 | #define STATUS_SWITCH_ERROR (1 << 7) |
| 78 | #define EMMC_GET_STATE(x) (((x) >> 9) & 0xf) |
| 79 | #define EMMC_STATE_IDLE 0 |
| 80 | #define EMMC_STATE_READY 1 |
| 81 | #define EMMC_STATE_IDENT 2 |
| 82 | #define EMMC_STATE_STBY 3 |
| 83 | #define EMMC_STATE_TRAN 4 |
| 84 | #define EMMC_STATE_DATA 5 |
| 85 | #define EMMC_STATE_RCV 6 |
| 86 | #define EMMC_STATE_PRG 7 |
| 87 | #define EMMC_STATE_DIS 8 |
| 88 | #define EMMC_STATE_BTST 9 |
| 89 | #define EMMC_STATE_SLP 10 |
| 90 | |
Haojian Zhuang | bd5cf9c | 2016-08-02 20:51:27 +0800 | [diff] [blame] | 91 | #define EMMC_FLAG_CMD23 (1 << 0) |
| 92 | |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 93 | typedef struct emmc_cmd { |
| 94 | unsigned int cmd_idx; |
| 95 | unsigned int cmd_arg; |
| 96 | unsigned int resp_type; |
| 97 | unsigned int resp_data[4]; |
| 98 | } emmc_cmd_t; |
| 99 | |
| 100 | typedef struct emmc_ops { |
| 101 | void (*init)(void); |
| 102 | int (*send_cmd)(emmc_cmd_t *cmd); |
| 103 | int (*set_ios)(int clk, int width); |
| 104 | int (*prepare)(int lba, uintptr_t buf, size_t size); |
| 105 | int (*read)(int lba, uintptr_t buf, size_t size); |
| 106 | int (*write)(int lba, const uintptr_t buf, size_t size); |
| 107 | } emmc_ops_t; |
| 108 | |
| 109 | typedef struct emmc_csd { |
Qixiang.Xu | e28ca9c | 2016-11-17 11:58:18 +0800 | [diff] [blame] | 110 | unsigned int not_used: 1; |
| 111 | unsigned int crc: 7; |
| 112 | unsigned int ecc: 2; |
| 113 | unsigned int file_format: 2; |
| 114 | unsigned int tmp_write_protect: 1; |
| 115 | unsigned int perm_write_protect: 1; |
| 116 | unsigned int copy: 1; |
| 117 | unsigned int file_format_grp: 1; |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 118 | |
Qixiang.Xu | e28ca9c | 2016-11-17 11:58:18 +0800 | [diff] [blame] | 119 | unsigned int reserved_1: 5; |
| 120 | unsigned int write_bl_partial: 1; |
| 121 | unsigned int write_bl_len: 4; |
| 122 | unsigned int r2w_factor: 3; |
| 123 | unsigned int default_ecc: 2; |
| 124 | unsigned int wp_grp_enable: 1; |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 125 | |
| 126 | unsigned int wp_grp_size: 5; |
| 127 | unsigned int erase_grp_mult: 5; |
| 128 | unsigned int erase_grp_size: 5; |
| 129 | unsigned int c_size_mult: 3; |
| 130 | unsigned int vdd_w_curr_max: 3; |
| 131 | unsigned int vdd_w_curr_min: 3; |
| 132 | unsigned int vdd_r_curr_max: 3; |
| 133 | unsigned int vdd_r_curr_min: 3; |
| 134 | unsigned int c_size_low: 2; |
| 135 | |
| 136 | unsigned int c_size_high: 10; |
| 137 | unsigned int reserved_2: 2; |
| 138 | unsigned int dsr_imp: 1; |
| 139 | unsigned int read_blk_misalign: 1; |
| 140 | unsigned int write_blk_misalign: 1; |
| 141 | unsigned int read_bl_partial: 1; |
| 142 | unsigned int read_bl_len: 4; |
| 143 | unsigned int ccc: 12; |
| 144 | |
| 145 | unsigned int tran_speed: 8; |
| 146 | unsigned int nsac: 8; |
| 147 | unsigned int taac: 8; |
| 148 | unsigned int reserved_3: 2; |
| 149 | unsigned int spec_vers: 4; |
| 150 | unsigned int csd_structure: 2; |
| 151 | } emmc_csd_t; |
| 152 | |
| 153 | size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size); |
| 154 | size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size); |
| 155 | size_t emmc_erase_blocks(int lba, size_t size); |
| 156 | size_t emmc_rpmb_read_blocks(int lba, uintptr_t buf, size_t size); |
| 157 | size_t emmc_rpmb_write_blocks(int lba, const uintptr_t buf, size_t size); |
| 158 | size_t emmc_rpmb_erase_blocks(int lba, size_t size); |
Haojian Zhuang | bd5cf9c | 2016-08-02 20:51:27 +0800 | [diff] [blame] | 159 | void emmc_init(const emmc_ops_t *ops, int clk, int bus_width, |
| 160 | unsigned int flags); |
Haojian Zhuang | fffe9e7 | 2016-03-18 22:08:26 +0800 | [diff] [blame] | 161 | |
| 162 | #endif /* __EMMC_H__ */ |