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Haojian Zhuang1b5c2252017-06-01 15:20:46 +08001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef HISI_PWRC_H
8#define HISI_PWRC_H
Haojian Zhuang1b5c2252017-06-01 15:20:46 +08009
10#include <hi3660.h>
11#include <hi3660_crg.h>
12
13#define PCTRL_BASE (PCTRL_REG_BASE)
14#define CRG_BASE (CRG_REG_BASE)
15
16#define SOC_CRGPERIPH_A53_PDCEN_ADDR(base) ((base) + (0x260))
17#define SOC_CRGPERIPH_MAIA_PDCEN_ADDR(base) ((base) + (0x300))
18
19#define SOC_PCTRL_RESOURCE0_LOCK_ADDR(base) ((base) + (0x400))
20#define SOC_PCTRL_RESOURCE0_UNLOCK_ADDR(base) ((base) + (0x404))
21#define SOC_PCTRL_RESOURCE0_LOCK_ST_ADDR(base) ((base) + (0x408))
22#define SOC_PCTRL_RESOURCE1_LOCK_ADDR(base) ((base) + (0x40C))
23#define SOC_PCTRL_RESOURCE1_UNLOCK_ADDR(base) ((base) + (0x410))
24#define SOC_PCTRL_RESOURCE1_LOCK_ST_ADDR(base) ((base) + (0x414))
25#define SOC_PCTRL_RESOURCE2_LOCK_ADDR(base) ((base) + (0x418))
26
27#define SOC_SCTRL_SCBAKDATA3_ADDR(base) ((base) + (0x418))
28#define SOC_SCTRL_SCBAKDATA8_ADDR(base) ((base) + (0x42C))
29#define SOC_SCTRL_SCBAKDATA9_ADDR(base) ((base) + (0x430))
30
31#define SOC_ACPU_SCTRL_BASE_ADDR (0xFFF0A000)
32
33void hisi_cpuidle_lock(unsigned int cluster, unsigned int core);
34void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core);
35void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core);
36void hisi_clear_cpuidle_flag(unsigned int cluster, unsigned int core);
37void hisi_set_cpu_boot_flag(unsigned int cluster, unsigned int core);
38void hisi_clear_cpu_boot_flag(unsigned int cluster, unsigned int core);
39int cluster_is_powered_on(unsigned int cluster);
40void hisi_enter_core_idle(unsigned int cluster, unsigned int core);
41void hisi_enter_cluster_idle(unsigned int cluster, unsigned int core);
Wei Yu633fc062019-04-07 11:29:28 +080042int hisi_test_ap_suspend_flag(void);
Haojian Zhuang1b5c2252017-06-01 15:20:46 +080043void hisi_enter_ap_suspend(unsigned int cluster, unsigned int core);
44
45
46/* pdc api */
47void hisi_pdc_mask_cluster_wakeirq(unsigned int cluster);
48int hisi_test_pwrdn_allcores(unsigned int cluster, unsigned int core);
49void hisi_disable_pdc(unsigned int cluster);
50void hisi_enable_pdc(unsigned int cluster);
51void hisi_powerup_core(unsigned int cluster, unsigned int core);
52void hisi_powerdn_core(unsigned int cluster, unsigned int core);
53void hisi_powerup_cluster(unsigned int cluster, unsigned int core);
54void hisi_powerdn_cluster(unsigned int cluster, unsigned int core);
55unsigned int hisi_test_cpu_down(unsigned int cluster, unsigned int core);
56
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000057#endif /* HISI_PWRC_H */