blob: 11668797b661eb2c1467d309e6da41e6470cdd55 [file] [log] [blame]
Samuel Hollandb8566642017-08-12 04:07:39 -05001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Andre Przywara456208a2018-10-14 12:02:02 +01007#ifndef SUNXI_PRIVATE_H
8#define SUNXI_PRIVATE_H
Samuel Hollandb8566642017-08-12 04:07:39 -05009
10void sunxi_configure_mmu_el3(int flags);
Andre Przywara456208a2018-10-14 12:02:02 +010011
Samuel Hollandc629daf2019-02-17 15:33:33 -060012void sunxi_cpu_on(u_register_t mpidr);
13void sunxi_cpu_off(u_register_t mpidr);
14void sunxi_disable_secondary_cpus(u_register_t primary_mpidr);
Andre Przywara456208a2018-10-14 12:02:02 +010015void __dead2 sunxi_power_down(void);
Icenowy Zheng7508bef2018-07-21 20:41:12 +080016
Andre Przywara4e4b1e62018-09-08 19:18:37 +010017int sunxi_pmic_setup(uint16_t socid, const void *fdt);
Andre Przywara13815472018-06-01 02:01:39 +010018void sunxi_security_setup(void);
19
Andre Przywara456208a2018-10-14 12:02:02 +010020uint16_t sunxi_read_soc_id(void);
Andre Przywara435464d2018-10-14 12:03:23 +010021void sunxi_set_gpio_out(char port, int pin, bool level_high);
Andre Przywara67537762018-10-14 22:13:53 +010022int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb);
Andre Przywara9b490722018-10-14 11:45:41 +010023void sunxi_execute_arisc_code(uint32_t *code, size_t size,
24 int patch_offset, uint16_t param);
Icenowy Zhengbd57eb52018-07-22 21:52:50 +080025
Andre Przywara456208a2018-10-14 12:02:02 +010026#endif /* SUNXI_PRIVATE_H */