Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 1 | /* |
Jit Loon Lim | 86f6fb3 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 2 | * Copyright (c) 2019-2023, Intel Corporation. All rights reserved. |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 6 | #include <assert.h> |
| 7 | #include <common/debug.h> |
| 8 | #include <errno.h> |
| 9 | #include <lib/mmio.h> |
Jit Loon Lim | 28c1c78 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 10 | #include <platform_def.h> |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 11 | |
| 12 | #include "ncore_ccu.h" |
Jit Loon Lim | 86f6fb3 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 13 | #include "socfpga_plat_def.h" |
| 14 | #include "socfpga_system_manager.h" |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 15 | |
| 16 | uint32_t poll_active_bit(uint32_t dir); |
| 17 | |
Jit Loon Lim | 17d0762 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 18 | #define SMMU_DMI 1 |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 19 | |
| 20 | |
Jit Loon Lim | 17d0762 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 21 | static coh_ss_id_t subsystem_id; |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 22 | void get_subsystem_id(void) |
| 23 | { |
| 24 | uint32_t snoop_filter, directory, coh_agent; |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 25 | snoop_filter = CSIDR_NUM_SF(mmio_read_32(NCORE_CCU_CSR(NCORE_CSIDR))); |
| 26 | directory = CSUIDR_NUM_DIR(mmio_read_32(NCORE_CCU_CSR(NCORE_CSUIDR))); |
| 27 | coh_agent = CSUIDR_NUM_CAI(mmio_read_32(NCORE_CCU_CSR(NCORE_CSUIDR))); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 28 | subsystem_id.num_snoop_filter = snoop_filter + 1; |
| 29 | subsystem_id.num_directory = directory; |
| 30 | subsystem_id.num_coh_agent = coh_agent; |
| 31 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 32 | uint32_t directory_init(void) |
| 33 | { |
| 34 | uint32_t dir_sf_mtn, dir_sf_en; |
| 35 | uint32_t dir, sf, ret; |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 36 | for (dir = 0; dir < subsystem_id.num_directory; dir++) { |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 37 | for (sf = 0; sf < subsystem_id.num_snoop_filter; sf++) { |
Tien Hock Loh | 070ffbb | 2020-05-11 01:11:55 -0700 | [diff] [blame] | 38 | dir_sf_mtn = DIRECTORY_UNIT(dir, NCORE_DIRUSFMCR); |
| 39 | dir_sf_en = DIRECTORY_UNIT(dir, NCORE_DIRUSFER); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 40 | /* Initialize All Entries */ |
Jit Loon Lim | 12fd5ed | 2022-11-10 22:08:13 +0800 | [diff] [blame] | 41 | mmio_write_32(dir_sf_mtn, SNOOP_FILTER_ID(sf)); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 42 | /* Poll Active Bit */ |
| 43 | ret = poll_active_bit(dir); |
| 44 | if (ret != 0) { |
| 45 | ERROR("Timeout during active bit polling"); |
| 46 | return -ETIMEDOUT; |
| 47 | } |
Jit Loon Lim | 12fd5ed | 2022-11-10 22:08:13 +0800 | [diff] [blame] | 48 | /* Disable snoop filter, a bit per snoop filter */ |
| 49 | mmio_clrbits_32(dir_sf_en, BIT(sf)); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 50 | } |
| 51 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 52 | return 0; |
| 53 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 54 | uint32_t coherent_agent_intfc_init(void) |
| 55 | { |
| 56 | uint32_t dir, ca, ca_id, ca_type, ca_snoop_en; |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 57 | for (dir = 0; dir < subsystem_id.num_directory; dir++) { |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 58 | for (ca = 0; ca < subsystem_id.num_coh_agent; ca++) { |
Tien Hock Loh | 070ffbb | 2020-05-11 01:11:55 -0700 | [diff] [blame] | 59 | ca_snoop_en = DIRECTORY_UNIT(ca, NCORE_DIRUCASER0); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 60 | ca_id = mmio_read_32(COH_AGENT_UNIT(ca, NCORE_CAIUIDR)); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 61 | /* Coh Agent Snoop Enable */ |
| 62 | if (CACHING_AGENT_BIT(ca_id)) |
Jit Loon Lim | 8eb61b7 | 2023-06-10 00:13:44 +0800 | [diff] [blame] | 63 | mmio_setbits_32(ca_snoop_en, BIT(ca)); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 64 | /* Coh Agent Snoop DVM Enable */ |
| 65 | ca_type = CACHING_AGENT_TYPE(ca_id); |
| 66 | if (ca_type == ACE_W_DVM || ca_type == ACE_L_W_DVM) |
Jit Loon Lim | 8eb61b7 | 2023-06-10 00:13:44 +0800 | [diff] [blame] | 67 | mmio_setbits_32(NCORE_CCU_CSR(NCORE_CSADSER0), |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 68 | BIT(ca)); |
| 69 | } |
| 70 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 71 | return 0; |
| 72 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 73 | uint32_t poll_active_bit(uint32_t dir) |
| 74 | { |
| 75 | uint32_t timeout = 80000; |
| 76 | uint32_t poll_dir = DIRECTORY_UNIT(dir, NCORE_DIRUSFMAR); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 77 | while (timeout > 0) { |
| 78 | if (mmio_read_32(poll_dir) == 0) |
| 79 | return 0; |
| 80 | timeout--; |
| 81 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 82 | return -1; |
| 83 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 84 | void bypass_ocram_firewall(void) |
| 85 | { |
| 86 | mmio_clrbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF1), |
| 87 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 88 | mmio_clrbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF2), |
| 89 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 90 | mmio_clrbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF3), |
| 91 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 92 | mmio_clrbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF4), |
| 93 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 94 | } |
Boon Khai Ng | 1e5550b | 2021-05-21 22:56:37 +0800 | [diff] [blame] | 95 | void ncore_enable_ocram_firewall(void) |
| 96 | { |
| 97 | mmio_setbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF1), |
| 98 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 99 | mmio_setbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF2), |
| 100 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 101 | mmio_setbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF3), |
| 102 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 103 | mmio_setbits_32(COH_CPU0_BYPASS_REG(NCORE_FW_OCRAM_BLK_CGF4), |
| 104 | OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK); |
| 105 | } |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 106 | uint32_t init_ncore_ccu(void) |
| 107 | { |
| 108 | uint32_t status; |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 109 | get_subsystem_id(); |
| 110 | status = directory_init(); |
| 111 | status = coherent_agent_intfc_init(); |
| 112 | bypass_ocram_firewall(); |
Hadi Asyrafi | 073e70d | 2019-06-17 12:30:22 +0800 | [diff] [blame] | 113 | return status; |
| 114 | } |
Jit Loon Lim | 17d0762 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 115 | |
| 116 | void setup_smmu_stream_id(void) |
| 117 | { |
| 118 | /* Configure Stream ID for Agilex5 */ |
| 119 | mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_ID_AX_REG_0_DMA0), DMA0); |
| 120 | mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_ID_AX_REG_0_DMA1), DMA1); |
| 121 | mmio_write_32(SOCFPGA_SYSMGR(SDM_TBU_STREAM_ID_AX_REG_1_SDM), SDM); |
| 122 | /* Reg map showing USB2 but Linux USB0? */ |
| 123 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_USB2), USB0); |
| 124 | /* Reg map showing USB3 but Linux USB1? */ |
| 125 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_USB3), USB1); |
| 126 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_SDMMC), SDMMC); |
| 127 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_NAND), NAND); |
| 128 | /* To confirm ETR - core sight debug*/ |
| 129 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_ETR), CORE_SIGHT_DEBUG); |
| 130 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_TSN0), TSN0); |
| 131 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_TSN1), TSN1); |
| 132 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_TSN2), TSN2); |
| 133 | |
| 134 | /* Enabled Stream ctrl register for Agilex5 */ |
| 135 | mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_CTRL_REG_0_DMA0), ENABLE_STREAMID); |
| 136 | mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_CTRL_REG_0_DMA1), ENABLE_STREAMID); |
Sieu Mun Tang | 5dac95d | 2023-09-15 15:13:46 +0800 | [diff] [blame] | 137 | mmio_write_32(SOCFPGA_SYSMGR(SDM_TBU_STREAM_CTRL_REG_1_SDM), ENABLE_STREAMID); |
Jit Loon Lim | 17d0762 | 2023-05-17 12:26:11 +0800 | [diff] [blame] | 138 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_USB2), ENABLE_STREAMID); |
| 139 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_USB3), ENABLE_STREAMID); |
| 140 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_SDMMC), ENABLE_STREAMID); |
| 141 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_NAND), ENABLE_STREAMID); |
| 142 | mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_ETR), ENABLE_STREAMID); |
| 143 | mmio_write_32(SOCFPGA_SYSMGR(TSN_TBU_STREAM_CTRL_REG_3_TSN0), ENABLE_STREAMID); |
| 144 | mmio_write_32(SOCFPGA_SYSMGR(TSN_TBU_STREAM_CTRL_REG_3_TSN1), ENABLE_STREAMID); |
| 145 | mmio_write_32(SOCFPGA_SYSMGR(TSN_TBU_STREAM_CTRL_REG_3_TSN2), ENABLE_STREAMID); |
| 146 | } |