blob: a13ee495a202b7987c56b77f55e6e2af54dca6e0 [file] [log] [blame]
Tony Xief6118cc2016-01-15 17:17:32 +08001/*
Julius Werner65d52672019-05-24 20:37:58 -07002 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
Tony Xief6118cc2016-01-15 17:17:32 +08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Tony Xief6118cc2016-01-15 17:17:32 +08005 */
6
Tony Xief6118cc2016-01-15 17:17:32 +08007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Tony Xief6118cc2016-01-15 17:17:32 +08009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/bl_common.h>
12#include <common/debug.h>
Julius Wernerf1d230c2019-05-30 16:57:15 -070013#include <common/desc_image_load.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000014#include <drivers/console.h>
15#include <drivers/generic_delay_timer.h>
16#include <drivers/ti/uart/uart_16550.h>
17#include <lib/coreboot.h>
18#include <lib/mmio.h>
19#include <plat_private.h>
20#include <plat/common/platform.h>
Tony Xief6118cc2016-01-15 17:17:32 +080021
Tony Xief6118cc2016-01-15 17:17:32 +080022static entry_point_info_t bl32_ep_info;
23static entry_point_info_t bl33_ep_info;
24
25/*******************************************************************************
26 * Return a pointer to the 'entry_point_info' structure of the next image for
27 * the security state specified. BL33 corresponds to the non-secure image type
28 * while BL32 corresponds to the secure image type. A NULL pointer is returned
29 * if the image does not exist.
30 ******************************************************************************/
31entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
32{
33 entry_point_info_t *next_image_info;
34
35 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
Julius Wernerf1d230c2019-05-30 16:57:15 -070036 assert(next_image_info->h.type == PARAM_EP);
Tony Xief6118cc2016-01-15 17:17:32 +080037
38 /* None of the images on this platform can have 0x0 as the entrypoint */
39 if (next_image_info->pc)
40 return next_image_info;
41 else
42 return NULL;
43}
44
tony.xie54973e72017-04-24 16:18:10 +080045#pragma weak params_early_setup
Julius Werner65d52672019-05-24 20:37:58 -070046void params_early_setup(u_register_t plat_param_from_bl2)
tony.xie54973e72017-04-24 16:18:10 +080047{
48}
49
Tony Xief6118cc2016-01-15 17:17:32 +080050/*******************************************************************************
51 * Perform any BL3-1 early platform setup. Here is an opportunity to copy
John Tsichritzisd653d332018-09-14 10:34:57 +010052 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they
Tony Xief6118cc2016-01-15 17:17:32 +080053 * are lost (potentially). This needs to be done before the MMU is initialized
54 * so that the memory layout can be used while creating page tables.
55 * BL2 has flushed this information to memory, so we are guaranteed to pick up
56 * good data.
57 ******************************************************************************/
Antonio Nino Diaz58230902018-09-24 17:16:20 +010058void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
59 u_register_t arg2, u_register_t arg3)
Tony Xief6118cc2016-01-15 17:17:32 +080060{
Julius Wernerf39c8062017-08-02 16:31:04 -070061 static console_16550_t console;
62
Julius Werner65d52672019-05-24 20:37:58 -070063 params_early_setup(arg1);
Julius Wernerc7087782017-06-09 15:22:44 -070064
65#if COREBOOT
66 if (coreboot_serial.type)
Julius Wernerf39c8062017-08-02 16:31:04 -070067 console_16550_register(coreboot_serial.baseaddr,
68 coreboot_serial.input_hertz,
69 coreboot_serial.baud,
70 &console);
Julius Wernerc7087782017-06-09 15:22:44 -070071#else
Christoph Müllnercb9204a2019-04-19 14:16:27 +020072 console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK,
Julius Wernerf39c8062017-08-02 16:31:04 -070073 PLAT_RK_UART_BAUDRATE, &console);
Julius Wernerc7087782017-06-09 15:22:44 -070074#endif
Tony Xief6118cc2016-01-15 17:17:32 +080075
76 VERBOSE("bl31_setup\n");
77
Julius Wernerf1d230c2019-05-30 16:57:15 -070078 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
Tony Xief6118cc2016-01-15 17:17:32 +080079}
80
81/*******************************************************************************
82 * Perform any BL3-1 platform setup code
83 ******************************************************************************/
84void bl31_platform_setup(void)
85{
Antonio Nino Diaz2361fcc2016-05-05 15:25:02 +010086 generic_delay_timer_init();
Tony Xief6118cc2016-01-15 17:17:32 +080087 plat_rockchip_soc_init();
88
89 /* Initialize the gic cpu and distributor interfaces */
90 plat_rockchip_gic_driver_init();
91 plat_rockchip_gic_init();
92 plat_rockchip_pmu_init();
93}
94
95/*******************************************************************************
96 * Perform the very early platform specific architectural setup here. At the
97 * moment this is only intializes the mmu in a quick and dirty way.
98 ******************************************************************************/
99void bl31_plat_arch_setup(void)
100{
101 plat_cci_init();
102 plat_cci_enable();
Heiko Stuebnerabcff552019-05-29 12:03:38 +0200103 plat_configure_mmu_el3(BL_CODE_BASE,
104 BL_COHERENT_RAM_END - BL_CODE_BASE,
105 BL_CODE_BASE,
106 BL_CODE_END,
Masahiro Yamada0fac5af2016-12-28 16:11:41 +0900107 BL_COHERENT_RAM_BASE,
108 BL_COHERENT_RAM_END);
Tony Xief6118cc2016-01-15 17:17:32 +0800109}