Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 1 | /* |
Govindraj Raja | eee28e7 | 2023-08-01 15:52:40 -0500 | [diff] [blame] | 2 | * Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved. |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <context.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | #include <services/arm_arch_svc.h> |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 11 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 12 | .globl wa_cve_2017_5715_bpiall_vbar |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 13 | |
| 14 | #define EMIT_BPIALL 0xee070fd5 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 15 | #define EMIT_SMC 0xe1600070 |
Dimitris Papastamos | 2880363 | 2018-01-08 13:57:39 +0000 | [diff] [blame] | 16 | #define ESR_EL3_A64_SMC0 0x5e000000 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 17 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 18 | .macro apply_cve_2017_5715_wa _from_vector |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 19 | /* |
| 20 | * Save register state to enable a call to AArch32 S-EL1 and return |
| 21 | * Identify the original calling vector in w2 (==_from_vector) |
| 22 | * Use w3-w6 for additional register state preservation while in S-EL1 |
| 23 | */ |
| 24 | |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 25 | /* Save GP regs */ |
| 26 | stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0] |
| 27 | stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |
| 28 | stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4] |
| 29 | stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6] |
| 30 | stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8] |
| 31 | stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10] |
| 32 | stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12] |
| 33 | stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14] |
| 34 | stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16] |
| 35 | stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18] |
| 36 | stp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20] |
| 37 | stp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22] |
| 38 | stp x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24] |
| 39 | stp x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26] |
| 40 | stp x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28] |
| 41 | |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 42 | /* Identify the original exception vector */ |
| 43 | mov w2, \_from_vector |
| 44 | |
| 45 | /* Preserve 32-bit system registers in GP registers through the workaround */ |
| 46 | mrs x3, esr_el3 |
| 47 | mrs x4, spsr_el3 |
| 48 | mrs x5, scr_el3 |
| 49 | mrs x6, sctlr_el1 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 50 | |
| 51 | /* |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 52 | * Preserve LR and ELR_EL3 registers in the GP regs context. |
| 53 | * Temporarily use the CTX_GPREG_SP_EL0 slot to preserve ELR_EL3 |
| 54 | * through the workaround. This is OK because at this point the |
| 55 | * current state for this context's SP_EL0 is in the live system |
| 56 | * register, which is unmodified by the workaround. |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 57 | */ |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 58 | mrs x7, elr_el3 |
| 59 | stp x30, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 60 | |
| 61 | /* |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 62 | * Load system registers for entry to S-EL1. |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 63 | */ |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 64 | |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 65 | /* Mask all interrupts and set AArch32 Supervisor mode */ |
| 66 | movz w8, SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, SPSR_AIF_MASK) |
| 67 | |
| 68 | /* Switch EL3 exception vectors while the workaround is executing. */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 69 | adr x9, wa_cve_2017_5715_bpiall_ret_vbar |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 70 | |
| 71 | /* Setup SCTLR_EL1 with MMU off and I$ on */ |
| 72 | ldr x10, stub_sel1_sctlr |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 73 | |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 74 | /* Land at the S-EL1 workaround stub */ |
| 75 | adr x11, aarch32_stub |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 76 | |
| 77 | /* |
| 78 | * Setting SCR_EL3 to all zeroes means that the NS, RW |
| 79 | * and SMD bits are configured as expected. |
| 80 | */ |
| 81 | msr scr_el3, xzr |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 82 | msr spsr_el3, x8 |
| 83 | msr vbar_el3, x9 |
| 84 | msr sctlr_el1, x10 |
| 85 | msr elr_el3, x11 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 86 | |
| 87 | eret |
| 88 | .endm |
| 89 | |
| 90 | /* --------------------------------------------------------------------- |
| 91 | * This vector table is used at runtime to enter the workaround at |
| 92 | * AArch32 S-EL1 for Sync/IRQ/FIQ/SError exceptions. If the workaround |
| 93 | * is not enabled, the existing runtime exception vector table is used. |
| 94 | * --------------------------------------------------------------------- |
| 95 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 96 | vector_base wa_cve_2017_5715_bpiall_vbar |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 97 | |
| 98 | /* --------------------------------------------------------------------- |
| 99 | * Current EL with SP_EL0 : 0x0 - 0x200 |
| 100 | * --------------------------------------------------------------------- |
| 101 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 102 | vector_entry bpiall_sync_exception_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 103 | b sync_exception_sp_el0 |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 104 | nop /* to force 8 byte alignment for the following stub */ |
| 105 | |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 106 | /* |
| 107 | * Since each vector table entry is 128 bytes, we can store the |
| 108 | * stub context in the unused space to minimize memory footprint. |
| 109 | */ |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 110 | stub_sel1_sctlr: |
| 111 | .quad SCTLR_AARCH32_EL1_RES1 | SCTLR_I_BIT |
| 112 | |
| 113 | aarch32_stub: |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 114 | .word EMIT_BPIALL |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 115 | .word EMIT_SMC |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 116 | |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 117 | end_vector_entry bpiall_sync_exception_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 118 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 119 | vector_entry bpiall_irq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 120 | b irq_sp_el0 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 121 | end_vector_entry bpiall_irq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 122 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 123 | vector_entry bpiall_fiq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 124 | b fiq_sp_el0 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 125 | end_vector_entry bpiall_fiq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 126 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 127 | vector_entry bpiall_serror_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 128 | b serror_sp_el0 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 129 | end_vector_entry bpiall_serror_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 130 | |
| 131 | /* --------------------------------------------------------------------- |
| 132 | * Current EL with SP_ELx: 0x200 - 0x400 |
| 133 | * --------------------------------------------------------------------- |
| 134 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 135 | vector_entry bpiall_sync_exception_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 136 | b sync_exception_sp_elx |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 137 | end_vector_entry bpiall_sync_exception_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 138 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 139 | vector_entry bpiall_irq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 140 | b irq_sp_elx |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 141 | end_vector_entry bpiall_irq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 142 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 143 | vector_entry bpiall_fiq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 144 | b fiq_sp_elx |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 145 | end_vector_entry bpiall_fiq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 146 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 147 | vector_entry bpiall_serror_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 148 | b serror_sp_elx |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 149 | end_vector_entry bpiall_serror_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 150 | |
| 151 | /* --------------------------------------------------------------------- |
| 152 | * Lower EL using AArch64 : 0x400 - 0x600 |
| 153 | * --------------------------------------------------------------------- |
| 154 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 155 | vector_entry bpiall_sync_exception_aarch64 |
| 156 | apply_cve_2017_5715_wa 1 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 157 | end_vector_entry bpiall_sync_exception_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 158 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 159 | vector_entry bpiall_irq_aarch64 |
| 160 | apply_cve_2017_5715_wa 2 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 161 | end_vector_entry bpiall_irq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 162 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 163 | vector_entry bpiall_fiq_aarch64 |
| 164 | apply_cve_2017_5715_wa 4 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 165 | end_vector_entry bpiall_fiq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 166 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 167 | vector_entry bpiall_serror_aarch64 |
| 168 | apply_cve_2017_5715_wa 8 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 169 | end_vector_entry bpiall_serror_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 170 | |
| 171 | /* --------------------------------------------------------------------- |
| 172 | * Lower EL using AArch32 : 0x600 - 0x800 |
| 173 | * --------------------------------------------------------------------- |
| 174 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 175 | vector_entry bpiall_sync_exception_aarch32 |
| 176 | apply_cve_2017_5715_wa 1 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 177 | end_vector_entry bpiall_sync_exception_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 178 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 179 | vector_entry bpiall_irq_aarch32 |
| 180 | apply_cve_2017_5715_wa 2 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 181 | end_vector_entry bpiall_irq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 182 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 183 | vector_entry bpiall_fiq_aarch32 |
| 184 | apply_cve_2017_5715_wa 4 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 185 | end_vector_entry bpiall_fiq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 186 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 187 | vector_entry bpiall_serror_aarch32 |
| 188 | apply_cve_2017_5715_wa 8 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 189 | end_vector_entry bpiall_serror_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 190 | |
| 191 | /* --------------------------------------------------------------------- |
| 192 | * This vector table is used while the workaround is executing. It |
| 193 | * installs a simple SMC handler to allow the Sync/IRQ/FIQ/SError |
| 194 | * workaround stubs to enter EL3 from S-EL1. It restores the previous |
| 195 | * EL3 state before proceeding with the normal runtime exception vector. |
| 196 | * --------------------------------------------------------------------- |
| 197 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 198 | vector_base wa_cve_2017_5715_bpiall_ret_vbar |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 199 | |
| 200 | /* --------------------------------------------------------------------- |
| 201 | * Current EL with SP_EL0 : 0x0 - 0x200 (UNUSED) |
| 202 | * --------------------------------------------------------------------- |
| 203 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 204 | vector_entry bpiall_ret_sync_exception_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 205 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 206 | end_vector_entry bpiall_ret_sync_exception_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 207 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 208 | vector_entry bpiall_ret_irq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 209 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 210 | end_vector_entry bpiall_ret_irq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 211 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 212 | vector_entry bpiall_ret_fiq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 213 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 214 | end_vector_entry bpiall_ret_fiq_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 215 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 216 | vector_entry bpiall_ret_serror_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 217 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 218 | end_vector_entry bpiall_ret_serror_sp_el0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 219 | |
| 220 | /* --------------------------------------------------------------------- |
| 221 | * Current EL with SP_ELx: 0x200 - 0x400 (UNUSED) |
| 222 | * --------------------------------------------------------------------- |
| 223 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 224 | vector_entry bpiall_ret_sync_exception_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 225 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 226 | end_vector_entry bpiall_ret_sync_exception_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 227 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 228 | vector_entry bpiall_ret_irq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 229 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 230 | end_vector_entry bpiall_ret_irq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 231 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 232 | vector_entry bpiall_ret_fiq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 233 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 234 | end_vector_entry bpiall_ret_fiq_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 235 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 236 | vector_entry bpiall_ret_serror_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 237 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 238 | end_vector_entry bpiall_ret_serror_sp_elx |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 239 | |
| 240 | /* --------------------------------------------------------------------- |
| 241 | * Lower EL using AArch64 : 0x400 - 0x600 (UNUSED) |
| 242 | * --------------------------------------------------------------------- |
| 243 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 244 | vector_entry bpiall_ret_sync_exception_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 245 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 246 | end_vector_entry bpiall_ret_sync_exception_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 247 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 248 | vector_entry bpiall_ret_irq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 249 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 250 | end_vector_entry bpiall_ret_irq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 251 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 252 | vector_entry bpiall_ret_fiq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 253 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 254 | end_vector_entry bpiall_ret_fiq_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 255 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 256 | vector_entry bpiall_ret_serror_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 257 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 258 | end_vector_entry bpiall_ret_serror_aarch64 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 259 | |
| 260 | /* --------------------------------------------------------------------- |
| 261 | * Lower EL using AArch32 : 0x600 - 0x800 |
| 262 | * --------------------------------------------------------------------- |
| 263 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 264 | vector_entry bpiall_ret_sync_exception_aarch32 |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 265 | /* |
| 266 | * w2 indicates which SEL1 stub was run and thus which original vector was used |
| 267 | * w3-w6 contain saved system register state (esr_el3 in w3) |
| 268 | * Restore LR and ELR_EL3 register state from the GP regs context |
| 269 | */ |
| 270 | ldp x30, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 271 | |
| 272 | /* Apply the restored system register state */ |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 273 | msr esr_el3, x3 |
| 274 | msr spsr_el3, x4 |
| 275 | msr scr_el3, x5 |
| 276 | msr sctlr_el1, x6 |
| 277 | msr elr_el3, x7 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 278 | |
| 279 | /* |
| 280 | * Workaround is complete, so swap VBAR_EL3 to point |
| 281 | * to workaround entry table in preparation for subsequent |
| 282 | * Sync/IRQ/FIQ/SError exceptions. |
| 283 | */ |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 284 | adr x0, wa_cve_2017_5715_bpiall_vbar |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 285 | msr vbar_el3, x0 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 286 | |
| 287 | /* |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 288 | * Restore all GP regs except x2 and x3 (esr). The value in x2 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 289 | * indicates the type of the original exception. |
| 290 | */ |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 291 | ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0] |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 292 | ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4] |
| 293 | ldp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6] |
| 294 | ldp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8] |
| 295 | ldp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10] |
| 296 | ldp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12] |
| 297 | ldp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14] |
| 298 | ldp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16] |
| 299 | ldp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18] |
| 300 | ldp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20] |
| 301 | ldp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22] |
| 302 | ldp x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24] |
| 303 | ldp x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26] |
| 304 | ldp x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28] |
| 305 | |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 306 | /* Fast path Sync exceptions. Static predictor will fall through. */ |
| 307 | tbz w2, #0, workaround_not_sync |
Dimitris Papastamos | 2880363 | 2018-01-08 13:57:39 +0000 | [diff] [blame] | 308 | |
| 309 | /* |
| 310 | * Check if SMC is coming from A64 state on #0 |
Bipin Ravi | caa2e05 | 2022-02-23 23:45:50 -0600 | [diff] [blame] | 311 | * with W0 = SMCCC_ARCH_WORKAROUND_1 or W0 = SMCCC_ARCH_WORKAROUND_3 |
Dimitris Papastamos | 2880363 | 2018-01-08 13:57:39 +0000 | [diff] [blame] | 312 | * |
| 313 | * This sequence evaluates as: |
Bipin Ravi | caa2e05 | 2022-02-23 23:45:50 -0600 | [diff] [blame] | 314 | * (W0==SMCCC_ARCH_WORKAROUND_1) || (W0==SMCCC_ARCH_WORKAROUND_3) ? |
| 315 | * (ESR_EL3==SMC#0) : (NE) |
Dimitris Papastamos | 2880363 | 2018-01-08 13:57:39 +0000 | [diff] [blame] | 316 | * allowing use of a single branch operation |
| 317 | */ |
| 318 | orr w2, wzr, #SMCCC_ARCH_WORKAROUND_1 |
| 319 | cmp w0, w2 |
Bipin Ravi | caa2e05 | 2022-02-23 23:45:50 -0600 | [diff] [blame] | 320 | orr w2, wzr, #SMCCC_ARCH_WORKAROUND_3 |
| 321 | ccmp w0, w2, #4, ne |
Dimitris Papastamos | 2880363 | 2018-01-08 13:57:39 +0000 | [diff] [blame] | 322 | mov_imm w2, ESR_EL3_A64_SMC0 |
| 323 | ccmp w3, w2, #0, eq |
| 324 | /* Static predictor will predict a fall through */ |
| 325 | bne 1f |
| 326 | eret |
| 327 | 1: |
Bipin Ravi | caa2e05 | 2022-02-23 23:45:50 -0600 | [diff] [blame] | 328 | /* restore x2 and x3 and continue sync exception handling */ |
| 329 | b bpiall_ret_sync_exception_aarch32_tail |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 330 | end_vector_entry bpiall_ret_sync_exception_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 331 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 332 | vector_entry bpiall_ret_irq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 333 | b report_unhandled_interrupt |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 334 | |
| 335 | /* |
| 336 | * Post-workaround fan-out for non-sync exceptions |
| 337 | */ |
| 338 | workaround_not_sync: |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 339 | tbnz w2, #3, bpiall_ret_serror |
| 340 | tbnz w2, #2, bpiall_ret_fiq |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 341 | /* IRQ */ |
| 342 | ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 343 | b irq_aarch64 |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 344 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 345 | bpiall_ret_fiq: |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 346 | ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |
| 347 | b fiq_aarch64 |
| 348 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 349 | bpiall_ret_serror: |
Dimitris Papastamos | b63c6f1 | 2018-01-11 15:29:36 +0000 | [diff] [blame] | 350 | ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |
| 351 | b serror_aarch64 |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 352 | end_vector_entry bpiall_ret_irq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 353 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 354 | vector_entry bpiall_ret_fiq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 355 | b report_unhandled_interrupt |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 356 | end_vector_entry bpiall_ret_fiq_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 357 | |
Dimitris Papastamos | 570c06a | 2018-04-06 15:29:34 +0100 | [diff] [blame] | 358 | vector_entry bpiall_ret_serror_aarch32 |
Dimitris Papastamos | c52ebdc | 2017-12-18 13:46:21 +0000 | [diff] [blame] | 359 | b report_unhandled_exception |
Roberto Vargas | 95f30ab | 2018-04-17 11:31:43 +0100 | [diff] [blame] | 360 | end_vector_entry bpiall_ret_serror_aarch32 |
Bipin Ravi | caa2e05 | 2022-02-23 23:45:50 -0600 | [diff] [blame] | 361 | |
| 362 | /* |
| 363 | * Part of bpiall_ret_sync_exception_aarch32 to save vector space |
| 364 | */ |
| 365 | func bpiall_ret_sync_exception_aarch32_tail |
| 366 | ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |
| 367 | b sync_exception_aarch64 |
| 368 | endfunc bpiall_ret_sync_exception_aarch32_tail |