| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 1 | /* |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 2 | * Copyright (c) 2021-2023, Arm Limited. All rights reserved. |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <common/bl_common.h> |
| 10 | #include <neoverse_v2.h> |
| 11 | #include <cpu_macros.S> |
| 12 | #include <plat_macros.S> |
| 13 | #include "wa_cve_2022_23960_bhb_vector.S" |
| 14 | |
| 15 | /* Hardware handled coherency */ |
| 16 | #if HW_ASSISTED_COHERENCY == 0 |
| 17 | #error "Neoverse V2 must be compiled with HW_ASSISTED_COHERENCY enabled" |
| 18 | #endif |
| 19 | |
| 20 | /* 64-bit only core */ |
| 21 | #if CTX_INCLUDE_AARCH32_REGS == 1 |
| 22 | #error "Neoverse V2 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" |
| 23 | #endif |
| 24 | |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 25 | workaround_runtime_start neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 |
| 26 | /* dsb before isb of power down sequence */ |
| 27 | dsb sy |
| 28 | workaround_runtime_end neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 |
| 29 | |
| 30 | check_erratum_ls neoverse_v2, ERRATUM(2801372), CPU_REV(0, 1) |
| 31 | |
| 32 | workaround_reset_start neoverse_v2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 |
| 33 | #if IMAGE_BL31 |
| 34 | /* |
| 35 | * The Neoverse-V2 generic vectors are overridden to apply errata |
| 36 | * mitigation on exception entry from lower ELs. |
| 37 | */ |
| Moritz Fischer | acef95c | 2023-07-18 19:08:12 +0000 | [diff] [blame] | 38 | override_vector_table wa_cve_vbar_neoverse_v2 |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 39 | #endif /* IMAGE_BL31 */ |
| 40 | workaround_reset_end neoverse_v2, CVE(2022,23960) |
| 41 | |
| 42 | check_erratum_chosen neoverse_v2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 |
| 43 | |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 44 | #if WORKAROUND_CVE_2022_23960 |
| 45 | wa_cve_2022_23960_bhb_vector_table NEOVERSE_V2_BHB_LOOP_COUNT, neoverse_v2 |
| 46 | #endif /* WORKAROUND_CVE_2022_23960 */ |
| 47 | |
| 48 | /* ---------------------------------------------------- |
| 49 | * HW will do the cache maintenance while powering down |
| 50 | * ---------------------------------------------------- |
| 51 | */ |
| 52 | func neoverse_v2_core_pwr_dwn |
| 53 | /* --------------------------------------------------- |
| 54 | * Enable CPU power down bit in power control register |
| 55 | * --------------------------------------------------- |
| 56 | */ |
| Moritz Fischer | acef95c | 2023-07-18 19:08:12 +0000 | [diff] [blame] | 57 | sysreg_bit_set NEOVERSE_V2_CPUPWRCTLR_EL1, NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 58 | apply_erratum neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 |
| 59 | |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 60 | isb |
| 61 | ret |
| 62 | endfunc neoverse_v2_core_pwr_dwn |
| 63 | |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 64 | cpu_reset_func_start neoverse_v2 |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 65 | /* Disable speculative loads */ |
| 66 | msr SSBS, xzr |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 67 | cpu_reset_func_end neoverse_v2 |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 68 | |
| Moritz Fischer | cbb6f58 | 2023-07-17 19:21:56 +0000 | [diff] [blame] | 69 | errata_report_shim neoverse_v2 |
| Joel Goddard | a1c50ab | 2022-09-21 21:52:28 +0530 | [diff] [blame] | 70 | /* --------------------------------------------- |
| 71 | * This function provides Neoverse V2- |
| 72 | * specific register information for crash |
| 73 | * reporting. It needs to return with x6 |
| 74 | * pointing to a list of register names in ascii |
| 75 | * and x8 - x15 having values of registers to be |
| 76 | * reported. |
| 77 | * --------------------------------------------- |
| 78 | */ |
| 79 | .section .rodata.neoverse_v2_regs, "aS" |
| 80 | neoverse_v2_regs: /* The ascii list of register names to be reported */ |
| 81 | .asciz "cpuectlr_el1", "" |
| 82 | |
| 83 | func neoverse_v2_cpu_reg_dump |
| 84 | adr x6, neoverse_v2_regs |
| 85 | mrs x8, NEOVERSE_V2_CPUECTLR_EL1 |
| 86 | ret |
| 87 | endfunc neoverse_v2_cpu_reg_dump |
| 88 | |
| 89 | declare_cpu_ops neoverse_v2, NEOVERSE_V2_MIDR, \ |
| 90 | neoverse_v2_reset_func, \ |
| 91 | neoverse_v2_core_pwr_dwn |