Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef SPMC_H |
| 8 | #define SPMC_H |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | #include <lib/psci/psci.h> |
| 13 | #include <lib/spinlock.h> |
Marc Bonnici | 9a29704 | 2022-02-14 17:06:09 +0000 | [diff] [blame] | 14 | #include <services/el3_spmc_logical_sp.h> |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 15 | #include "spm_common.h" |
| 16 | |
| 17 | /* |
| 18 | * Ranges of FF-A IDs for Normal world and Secure world components. The |
| 19 | * convention matches that used by other SPMCs i.e. Hafnium and OP-TEE. |
| 20 | */ |
| 21 | #define FFA_NWD_ID_BASE 0x0 |
| 22 | #define FFA_NWD_ID_LIMIT 0x7FFF |
| 23 | #define FFA_SWD_ID_BASE 0x8000 |
| 24 | #define FFA_SWD_ID_LIMIT SPMD_DIRECT_MSG_ENDPOINT_ID - 1 |
| 25 | #define FFA_SWD_ID_MASK 0x8000 |
| 26 | |
Marc Bonnici | 8eb1520 | 2021-11-29 17:05:33 +0000 | [diff] [blame] | 27 | /* ID 0 is reserved for the normal world entity, (Hypervisor or OS Kernel). */ |
| 28 | #define FFA_NWD_ID U(0) |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 29 | /* First ID is reserved for the SPMC */ |
| 30 | #define FFA_SPMC_ID U(FFA_SWD_ID_BASE) |
| 31 | /* SP IDs are allocated after the SPMC ID */ |
| 32 | #define FFA_SP_ID_BASE (FFA_SPMC_ID + 1) |
| 33 | /* Align with Hafnium implementation */ |
| 34 | #define INV_SP_ID 0x7FFF |
| 35 | |
Marc Bonnici | d4bb245 | 2021-12-13 11:08:59 +0000 | [diff] [blame] | 36 | /* FF-A Related helper macros. */ |
Marc Bonnici | 764e667 | 2021-08-31 17:57:04 +0100 | [diff] [blame] | 37 | #define FFA_ID_MASK U(0xFFFF) |
| 38 | #define FFA_PARTITION_ID_SHIFT U(16) |
Marc Bonnici | d4bb245 | 2021-12-13 11:08:59 +0000 | [diff] [blame] | 39 | #define FFA_FEATURES_BIT31_MASK U(0x1u << 31) |
| 40 | |
Marc Bonnici | 764e667 | 2021-08-31 17:57:04 +0100 | [diff] [blame] | 41 | #define FFA_RUN_EP_ID(ep_vcpu_ids) \ |
| 42 | ((ep_vcpu_ids >> FFA_PARTITION_ID_SHIFT) & FFA_ID_MASK) |
| 43 | #define FFA_RUN_VCPU_ID(ep_vcpu_ids) \ |
| 44 | (ep_vcpu_ids & FFA_ID_MASK) |
| 45 | |
Marc Bonnici | 0cf1a15 | 2021-08-25 12:09:37 +0100 | [diff] [blame] | 46 | #define FFA_PAGE_SIZE (4096) |
| 47 | #define FFA_RXTX_PAGE_COUNT_MASK 0x1F |
| 48 | |
| 49 | /* Ensure that the page size used by TF-A is 4k aligned. */ |
| 50 | CASSERT((PAGE_SIZE % FFA_PAGE_SIZE) == 0, assert_aligned_page_size); |
| 51 | |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 52 | /* |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 53 | * Defines to allow an SP to subscribe for power management messages |
| 54 | */ |
| 55 | #define FFA_PM_MSG_SUB_CPU_OFF U(1 << 0) |
| 56 | #define FFA_PM_MSG_SUB_CPU_SUSPEND U(1 << 1) |
| 57 | #define FFA_PM_MSG_SUB_CPU_SUSPEND_RESUME U(1 << 2) |
| 58 | |
| 59 | /* |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 60 | * Runtime states of an execution context as per the FF-A v1.1 specification. |
| 61 | */ |
| 62 | enum sp_runtime_states { |
| 63 | RT_STATE_WAITING, |
| 64 | RT_STATE_RUNNING, |
| 65 | RT_STATE_PREEMPTED, |
| 66 | RT_STATE_BLOCKED |
| 67 | }; |
| 68 | |
| 69 | /* |
| 70 | * Runtime model of an execution context as per the FF-A v1.1 specification. Its |
| 71 | * value is valid only if the execution context is not in the waiting state. |
| 72 | */ |
| 73 | enum sp_runtime_model { |
| 74 | RT_MODEL_DIR_REQ, |
| 75 | RT_MODEL_RUN, |
| 76 | RT_MODEL_INIT, |
| 77 | RT_MODEL_INTR |
| 78 | }; |
| 79 | |
| 80 | enum sp_runtime_el { |
| 81 | EL1 = 0, |
| 82 | S_EL0, |
| 83 | S_EL1 |
| 84 | }; |
| 85 | |
| 86 | enum sp_execution_state { |
| 87 | SP_STATE_AARCH64 = 0, |
| 88 | SP_STATE_AARCH32 |
| 89 | }; |
| 90 | |
Marc Bonnici | ecc460a | 2021-09-02 13:18:41 +0100 | [diff] [blame] | 91 | enum mailbox_state { |
| 92 | /* There is no message in the mailbox. */ |
| 93 | MAILBOX_STATE_EMPTY, |
| 94 | |
| 95 | /* There is a message that has been populated in the mailbox. */ |
| 96 | MAILBOX_STATE_FULL, |
| 97 | }; |
| 98 | |
| 99 | struct mailbox { |
| 100 | enum mailbox_state state; |
| 101 | |
| 102 | /* RX/TX Buffers. */ |
| 103 | void *rx_buffer; |
| 104 | const void *tx_buffer; |
| 105 | |
| 106 | /* Size of RX/TX Buffer. */ |
| 107 | uint32_t rxtx_page_count; |
| 108 | |
| 109 | /* Lock access to mailbox. */ |
| 110 | spinlock_t lock; |
| 111 | }; |
| 112 | |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 113 | /* |
| 114 | * Execution context members for an SP. This is a bit like struct |
| 115 | * vcpu in a hypervisor. |
| 116 | */ |
| 117 | struct sp_exec_ctx { |
| 118 | /* |
| 119 | * Store the stack address to restore C runtime context from after |
| 120 | * returning from a synchronous entry into the SP. |
| 121 | */ |
| 122 | uint64_t c_rt_ctx; |
| 123 | |
| 124 | /* Space to maintain the architectural state of an SP. */ |
| 125 | cpu_context_t cpu_ctx; |
| 126 | |
| 127 | /* Track the current runtime state of the SP. */ |
| 128 | enum sp_runtime_states rt_state; |
| 129 | |
| 130 | /* Track the current runtime model of the SP. */ |
| 131 | enum sp_runtime_model rt_model; |
| 132 | }; |
| 133 | |
| 134 | /* |
| 135 | * Structure to describe the cumulative properties of an SP. |
| 136 | */ |
| 137 | struct secure_partition_desc { |
| 138 | /* |
| 139 | * Execution contexts allocated to this endpoint. Ideally, |
| 140 | * we need as many contexts as there are physical cpus only |
| 141 | * for a S-EL1 SP which is MP-pinned. |
| 142 | */ |
| 143 | struct sp_exec_ctx ec[PLATFORM_CORE_COUNT]; |
| 144 | |
| 145 | /* ID of the Secure Partition. */ |
| 146 | uint16_t sp_id; |
| 147 | |
| 148 | /* Runtime EL. */ |
| 149 | enum sp_runtime_el runtime_el; |
| 150 | |
| 151 | /* Partition UUID. */ |
| 152 | uint32_t uuid[4]; |
| 153 | |
| 154 | /* Partition Properties. */ |
| 155 | uint32_t properties; |
| 156 | |
| 157 | /* Supported FF-A Version. */ |
| 158 | uint32_t ffa_version; |
| 159 | |
| 160 | /* Execution State. */ |
| 161 | enum sp_execution_state execution_state; |
| 162 | |
Marc Bonnici | ecc460a | 2021-09-02 13:18:41 +0100 | [diff] [blame] | 163 | /* Mailbox tracking. */ |
| 164 | struct mailbox mailbox; |
| 165 | |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 166 | /* Secondary entrypoint. Only valid for a S-EL1 SP. */ |
| 167 | uintptr_t secondary_ep; |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 168 | |
| 169 | /* |
| 170 | * Store whether the SP has subscribed to any power management messages. |
| 171 | */ |
| 172 | uint16_t pwr_mgmt_msgs; |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 173 | }; |
| 174 | |
| 175 | /* |
| 176 | * This define identifies the only SP that will be initialised and participate |
| 177 | * in FF-A communication. The implementation leaves the door open for more SPs |
| 178 | * to be managed in future but for now it is reasonable to assume that either a |
| 179 | * single S-EL0 or a single S-EL1 SP will be supported. This define will be used |
| 180 | * to identify which SP descriptor to initialise and manage during SP runtime. |
| 181 | */ |
| 182 | #define ACTIVE_SP_DESC_INDEX 0 |
| 183 | |
| 184 | /* |
| 185 | * Structure to describe the cumulative properties of the Hypervisor and |
| 186 | * NS-Endpoints. |
| 187 | */ |
| 188 | struct ns_endpoint_desc { |
| 189 | /* |
| 190 | * ID of the NS-Endpoint or Hypervisor. |
| 191 | */ |
| 192 | uint16_t ns_ep_id; |
| 193 | |
| 194 | /* |
Marc Bonnici | ecc460a | 2021-09-02 13:18:41 +0100 | [diff] [blame] | 195 | * Mailbox tracking. |
| 196 | */ |
| 197 | struct mailbox mailbox; |
| 198 | |
| 199 | /* |
| 200 | * Supported FF-A Version |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 201 | */ |
| 202 | uint32_t ffa_version; |
| 203 | }; |
| 204 | |
Marc Bonnici | 37dd8e1 | 2021-08-17 18:00:07 +0100 | [diff] [blame] | 205 | /** |
| 206 | * Holds information returned for each partition by the FFA_PARTITION_INFO_GET |
| 207 | * interface. |
| 208 | */ |
| 209 | struct ffa_partition_info_v1_0 { |
| 210 | uint16_t ep_id; |
| 211 | uint16_t execution_ctx_count; |
| 212 | uint32_t properties; |
| 213 | }; |
| 214 | |
| 215 | /* Extended structure for v1.1. */ |
| 216 | struct ffa_partition_info_v1_1 { |
| 217 | uint16_t ep_id; |
| 218 | uint16_t execution_ctx_count; |
| 219 | uint32_t properties; |
| 220 | uint32_t uuid[4]; |
| 221 | }; |
| 222 | |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 223 | /* Reference to power management hooks */ |
| 224 | extern const spd_pm_ops_t spmc_pm; |
| 225 | |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 226 | /* Setup Function for different SP types. */ |
| 227 | void spmc_sp_common_setup(struct secure_partition_desc *sp, |
Achin Gupta | eaf1716 | 2021-10-19 12:21:16 +0100 | [diff] [blame] | 228 | entry_point_info_t *ep_info, |
| 229 | int32_t boot_info_reg); |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 230 | void spmc_el1_sp_setup(struct secure_partition_desc *sp, |
| 231 | entry_point_info_t *ep_info); |
| 232 | void spmc_sp_common_ep_commit(struct secure_partition_desc *sp, |
| 233 | entry_point_info_t *ep_info); |
| 234 | |
| 235 | /* |
| 236 | * Helper function to perform a synchronous entry into a SP. |
| 237 | */ |
| 238 | uint64_t spmc_sp_synchronous_entry(struct sp_exec_ctx *ec); |
| 239 | |
| 240 | /* |
| 241 | * Helper function to obtain the descriptor of the current SP on a physical cpu. |
| 242 | */ |
| 243 | struct secure_partition_desc *spmc_get_current_sp_ctx(void); |
| 244 | |
| 245 | /* |
| 246 | * Helper function to obtain the execution context of an SP on a |
| 247 | * physical cpu. |
| 248 | */ |
| 249 | struct sp_exec_ctx *spmc_get_sp_ec(struct secure_partition_desc *sp); |
| 250 | |
| 251 | /* |
| 252 | * Helper function to obtain the index of the execution context of an SP on a |
| 253 | * physical cpu. |
| 254 | */ |
| 255 | unsigned int get_ec_index(struct secure_partition_desc *sp); |
| 256 | |
| 257 | uint64_t spmc_ffa_error_return(void *handle, int error_code); |
| 258 | |
| 259 | /* |
| 260 | * Ensure a partition ID does not clash and follows the secure world convention. |
| 261 | */ |
| 262 | bool is_ffa_secure_id_valid(uint16_t partition_id); |
| 263 | |
Marc Bonnici | 9a29704 | 2022-02-14 17:06:09 +0000 | [diff] [blame] | 264 | /* |
| 265 | * Helper function to obtain the array storing the EL3 |
| 266 | * Logical Partition descriptors. |
| 267 | */ |
| 268 | struct el3_lp_desc *get_el3_lp_array(void); |
| 269 | |
Marc Bonnici | a2cfa61 | 2021-11-24 10:33:48 +0000 | [diff] [blame] | 270 | /* |
| 271 | * Helper function to obtain the RX/TX buffer pair descriptor of the Hypervisor |
| 272 | * or OS kernel in the normal world or the last SP that was run. |
| 273 | */ |
| 274 | struct mailbox *spmc_get_mbox_desc(bool secure_origin); |
| 275 | |
Marc Bonnici | 336630f | 2022-01-13 11:39:10 +0000 | [diff] [blame] | 276 | /* |
| 277 | * Helper function to obtain the context of an SP with a given partition ID. |
| 278 | */ |
| 279 | struct secure_partition_desc *spmc_get_sp_ctx(uint16_t id); |
| 280 | |
| 281 | |
Marc Bonnici | 8e1a755 | 2021-12-01 17:57:04 +0000 | [diff] [blame] | 282 | #endif /* SPMC_H */ |