| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 1 | # |
| Varun Wadekar | be57abb | 2019-01-03 10:44:22 -0800 | [diff] [blame] | 2 | # Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. |
| Varun Wadekar | 29b4665 | 2018-05-17 11:10:13 -0700 | [diff] [blame] | 3 | # Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 4 | # |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 5 | # SPDX-License-Identifier: BSD-3-Clause |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 6 | # |
| 7 | |
| Varun Wadekar | 1edb882 | 2016-09-01 14:59:32 -0700 | [diff] [blame] | 8 | TZDRAM_BASE := 0xFF800000 |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 9 | $(eval $(call add_define,TZDRAM_BASE)) |
| 10 | |
| 11 | ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT := 1 |
| 12 | $(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT)) |
| 13 | |
| Varun Wadekar | d1b6150 | 2015-07-16 09:46:28 +0530 | [diff] [blame] | 14 | PLATFORM_CLUSTER_COUNT := 2 |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 15 | $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) |
| 16 | |
| Varun Wadekar | d1b6150 | 2015-07-16 09:46:28 +0530 | [diff] [blame] | 17 | PLATFORM_MAX_CPUS_PER_CLUSTER := 4 |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 18 | $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) |
| 19 | |
| Varun Wadekar | 7baa94a | 2017-05-31 14:03:00 -0700 | [diff] [blame] | 20 | MAX_XLAT_TABLES := 10 |
| Varun Wadekar | 97f2490 | 2015-09-09 11:29:24 +0530 | [diff] [blame] | 21 | $(eval $(call add_define,MAX_XLAT_TABLES)) |
| 22 | |
| Varun Wadekar | be57abb | 2019-01-03 10:44:22 -0800 | [diff] [blame] | 23 | MAX_MMAP_REGIONS := 16 |
| Varun Wadekar | 97f2490 | 2015-09-09 11:29:24 +0530 | [diff] [blame] | 24 | $(eval $(call add_define,MAX_MMAP_REGIONS)) |
| 25 | |
| Varun Wadekar | c6041c9 | 2018-01-26 10:33:42 -0800 | [diff] [blame] | 26 | ENABLE_WDT_LEGACY_FIQ_HANDLING := 1 |
| 27 | $(eval $(call add_define,ENABLE_WDT_LEGACY_FIQ_HANDLING)) |
| 28 | |
| Marvin Hsu | 21eea97 | 2017-04-11 11:00:48 +0800 | [diff] [blame] | 29 | PLAT_INCLUDES += -I${SOC_DIR}/drivers/se |
| 30 | |
| Varun Wadekar | 50a3303 | 2017-11-15 15:46:38 -0800 | [diff] [blame] | 31 | BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \ |
| 32 | lib/cpus/aarch64/cortex_a53.S \ |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 33 | lib/cpus/aarch64/cortex_a57.S \ |
| Varun Wadekar | 50a3303 | 2017-11-15 15:46:38 -0800 | [diff] [blame] | 34 | ${COMMON_DIR}/drivers/bpmp/bpmp.c \ |
| Varun Wadekar | a1176ba | 2015-08-25 17:01:06 +0530 | [diff] [blame] | 35 | ${COMMON_DIR}/drivers/flowctrl/flowctrl.c \ |
| Varun Wadekar | 7a9a285 | 2015-09-18 11:21:22 +0530 | [diff] [blame] | 36 | ${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \ |
| Varun Wadekar | 29b4665 | 2018-05-17 11:10:13 -0700 | [diff] [blame] | 37 | ${COMMON_DIR}/drivers/pmc/pmc.c \ |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 38 | ${SOC_DIR}/plat_psci_handlers.c \ |
| 39 | ${SOC_DIR}/plat_setup.c \ |
| Marvin Hsu | 21eea97 | 2017-04-11 11:00:48 +0800 | [diff] [blame] | 40 | ${SOC_DIR}/drivers/se/security_engine.c \ |
| kalyani chidambaram | a1ad9b7 | 2018-03-06 16:36:57 -0800 | [diff] [blame] | 41 | ${SOC_DIR}/plat_secondary.c \ |
| 42 | ${SOC_DIR}/plat_sip_calls.c |
| Varun Wadekar | b316e24 | 2015-05-19 16:48:04 +0530 | [diff] [blame] | 43 | |
| Varun Wadekar | ed3c62b | 2017-03-06 09:15:15 -0800 | [diff] [blame] | 44 | # Enable workarounds for selected Cortex-A57 erratas. |
| 45 | A57_DISABLE_NON_TEMPORAL_HINT := 1 |
| 46 | ERRATA_A57_826974 := 1 |
| 47 | ERRATA_A57_826977 := 1 |
| 48 | ERRATA_A57_828024 := 1 |
| Varun Wadekar | ed3c62b | 2017-03-06 09:15:15 -0800 | [diff] [blame] | 49 | ERRATA_A57_833471 := 1 |
| Varun Wadekar | d1b6150 | 2015-07-16 09:46:28 +0530 | [diff] [blame] | 50 | |
| Varun Wadekar | ed3c62b | 2017-03-06 09:15:15 -0800 | [diff] [blame] | 51 | # Enable workarounds for selected Cortex-A53 erratas. |
| 52 | A53_DISABLE_NON_TEMPORAL_HINT := 1 |
| 53 | ERRATA_A53_826319 := 1 |
| 54 | ERRATA_A53_836870 := 1 |
| Andre Przywara | 1108fc6 | 2016-11-07 10:53:14 +0000 | [diff] [blame] | 55 | ERRATA_A53_855873 := 1 |
| Varun Wadekar | ba31328 | 2018-02-13 20:31:12 -0800 | [diff] [blame] | 56 | |
| 57 | # Skip L1 $ flush when powering down Cortex-A57 CPUs |
| 58 | SKIP_A57_L1_FLUSH_PWR_DWN := 1 |
| Varun Wadekar | 976dc98 | 2018-06-12 16:54:55 -0700 | [diff] [blame] | 59 | |
| 60 | # Enable higher performance Non-cacheable load forwarding |
| 61 | A57_ENABLE_NONCACHEABLE_LOAD_FWD := 1 |