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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Deepika Bhavnani64e557c2019-09-03 21:51:09 +03002 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2bd4ef22014-04-09 13:14:54 +01007#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +01008#include <arch_helpers.h>
Etienne Carriereba7c3d52017-06-07 16:41:50 +02009#include "../bl1_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010010
11/*******************************************************************************
12 * Function that does the first bit of architectural setup that affects
13 * execution in the non-secure address space.
14 ******************************************************************************/
15void bl1_arch_setup(void)
16{
Achin Guptaed1744e2014-08-04 23:13:10 +010017 /* Set the next EL to be AArch64 */
Gerald Lejeune632d6df2016-03-22 09:29:23 +010018 write_scr_el3(read_scr_el3() | SCR_RW_BIT);
Achin Gupta4f6ad662013-10-25 09:08:21 +010019}
20
21/*******************************************************************************
22 * Set the Secure EL1 required architectural state
23 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010024void bl1_arch_next_el_setup(void)
25{
Deepika Bhavnani64e557c2019-09-03 21:51:09 +030026 u_register_t next_sctlr;
Achin Gupta4f6ad662013-10-25 09:08:21 +010027
28 /* Use the same endianness than the current BL */
Vikram Kanigiri78a6e0c2014-03-11 17:41:00 +000029 next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
Achin Gupta4f6ad662013-10-25 09:08:21 +010030
31 /* Set SCTLR Secure EL1 */
32 next_sctlr |= SCTLR_EL1_RES1;
33
34 write_sctlr_el1(next_sctlr);
35}