blob: 7bf9a3d06b46300cb228302a2fee249e9547c6ff [file] [log] [blame]
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +08001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <assert.h>
9#include <bl_common.h>
10#include <debug.h>
11#include <delay_timer.h>
12#include <errno.h>
13#include <hi3660.h>
14#include <mmio.h>
15#include <string.h>
16
17#define ADDR_CONVERT(addr) ((addr) < 0x40000 ? \
18 (addr) + 0xFFF30000 : \
19 (addr) + 0x40000000)
20
21static void fw_data_init(void)
22{
23 unsigned long data_head_addr;
24 unsigned int *data_addr;
25
26 data_head_addr = mmio_read_32((uintptr_t) HISI_DATA_HEAD_BASE) + 0x14;
27 data_addr = (unsigned int *) ADDR_CONVERT(data_head_addr);
28
29 memcpy((void *)HISI_DATA0_BASE,
30 (const void *)(unsigned long)ADDR_CONVERT(data_addr[0]),
31 HISI_DATA0_SIZE);
32 memcpy((void *)HISI_DATA1_BASE,
33 (const void *)(unsigned long)ADDR_CONVERT(data_addr[1]),
34 HISI_DATA1_SIZE);
35}
36
37int load_lpm3(void)
38{
39 INFO("start fw loading\n");
40
41 fw_data_init();
42
43 flush_dcache_range((uintptr_t)HISI_RESERVED_MEM_BASE,
44 HISI_RESERVED_MEM_SIZE);
45
46 sev();
47 sev();
48
49 INFO("fw load success\n");
50
51 return 0;
52}