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Usama Arifbec5afd2020-04-17 16:13:39 +01001/*
Boyan Karatotevffe75692023-11-29 15:27:18 +00002 * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved.
Usama Arifbec5afd2020-04-17 16:13:39 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8
9#include <libfdt.h>
Usama Ariff1513622021-04-09 17:07:41 +010010#include <tc_plat.h>
Usama Arifbec5afd2020-04-17 16:13:39 +010011
Manish V Badarkheb241efb2023-10-18 14:11:45 +010012#include <arch_helpers.h>
Usama Arifbec5afd2020-04-17 16:13:39 +010013#include <common/bl_common.h>
14#include <common/debug.h>
15#include <drivers/arm/css/css_mhu_doorbell.h>
16#include <drivers/arm/css/scmi.h>
Madhukar Pappireddye108df22023-03-22 15:40:40 -050017#include <drivers/arm/sbsa.h>
Usama Arifa49bd492021-08-17 17:57:10 +010018#include <lib/fconf/fconf.h>
19#include <lib/fconf/fconf_dyn_cfg_getter.h>
Usama Arifbec5afd2020-04-17 16:13:39 +010020#include <plat/arm/common/plat_arm.h>
21#include <plat/common/platform.h>
22
Manish V Badarkheb20ca822023-12-06 09:16:08 +000023#ifdef PLATFORM_TEST_TFM_TESTSUITE
Manish V Badarkheb241efb2023-10-18 14:11:45 +010024#include <psa/crypto_platform.h>
25#include <psa/crypto_types.h>
26#include <psa/crypto_values.h>
Manish V Badarkheb20ca822023-12-06 09:16:08 +000027#endif /* PLATFORM_TEST_TFM_TESTSUITE */
Manish V Badarkheb241efb2023-10-18 14:11:45 +010028
29#ifdef PLATFORM_TEST_TFM_TESTSUITE
30/*
31 * We pretend using an external RNG (through MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
32 * mbedTLS config option) so we need to provide an implementation of
33 * mbedtls_psa_external_get_random(). Provide a fake one, since we do not
34 * actually use any of external RNG and this function is only needed during
35 * the execution of TF-M testsuite during exporting the public part of the
36 * delegated attestation key.
37 */
38psa_status_t mbedtls_psa_external_get_random(
39 mbedtls_psa_external_random_context_t *context,
40 uint8_t *output, size_t output_size,
41 size_t *output_length)
42{
43 for (size_t i = 0U; i < output_size; i++) {
44 output[i] = (uint8_t)(read_cntpct_el0() & 0xFFU);
45 }
46
47 *output_length = output_size;
48
49 return PSA_SUCCESS;
50}
51#endif /* PLATFORM_TEST_TFM_TESTSUITE */
52
Usama Ariff1513622021-04-09 17:07:41 +010053static scmi_channel_plat_info_t tc_scmi_plat_info[] = {
Usama Arifbec5afd2020-04-17 16:13:39 +010054 {
55 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
56 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
57 .db_preserve_mask = 0xfffffffe,
58 .db_modify_mask = 0x1,
59 .ring_doorbell = &mhuv2_ring_doorbell,
60 }
61};
62
63void bl31_platform_setup(void)
64{
Usama Ariff1513622021-04-09 17:07:41 +010065 tc_bl31_common_platform_setup();
Usama Arifbec5afd2020-04-17 16:13:39 +010066}
67
Tony K Nadackal1b116a82022-12-07 20:44:05 +000068scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
Usama Arifbec5afd2020-04-17 16:13:39 +010069{
70
Usama Ariff1513622021-04-09 17:07:41 +010071 return &tc_scmi_plat_info[channel_id];
Usama Arifbec5afd2020-04-17 16:13:39 +010072
73}
74
75void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
76 u_register_t arg2, u_register_t arg3)
77{
78 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Usama Arifa49bd492021-08-17 17:57:10 +010079
80 /* Fill the properties struct with the info from the config dtb */
81 fconf_populate("FW_CONFIG", arg1);
Usama Arifbec5afd2020-04-17 16:13:39 +010082}
83
laurenw-arm4c4181c2023-05-04 14:55:37 -050084#ifdef PLATFORM_TESTS
Sandrine Bailleux27fba522023-05-05 15:44:26 +020085static __dead2 void tc_run_platform_tests(void)
Usama Arifbec5afd2020-04-17 16:13:39 +010086{
Sandrine Bailleuxf0f42fb2023-05-05 15:59:00 +020087 int tests_failed;
88
89 printf("\nStarting platform tests...\n");
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +020090
Tamas Ban15b79da2023-04-21 09:31:48 +020091#ifdef PLATFORM_TEST_NV_COUNTERS
Sandrine Bailleuxf0f42fb2023-05-05 15:59:00 +020092 tests_failed = nv_counter_test();
laurenw-arm116f10c2023-06-13 16:43:39 -050093#elif PLATFORM_TEST_ROTPK
94 tests_failed = rotpk_test();
Tamas Ban15b79da2023-04-21 09:31:48 +020095#elif PLATFORM_TEST_TFM_TESTSUITE
Sandrine Bailleuxf0f42fb2023-05-05 15:59:00 +020096 tests_failed = run_platform_tests();
laurenw-arm2ce1e352023-02-07 13:40:05 -060097#endif
Sandrine Bailleuxf0f42fb2023-05-05 15:59:00 +020098
99 printf("Platform tests %s.\n",
100 (tests_failed != 0) ? "failed" : "succeeded");
101
Sandrine Bailleuxe1da6c42023-05-05 13:59:07 +0200102 /* Suspend booting, no matter the tests outcome. */
Sandrine Bailleuxf0f42fb2023-05-05 15:59:00 +0200103 printf("Suspend booting...\n");
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +0200104 plat_error_handler(-1);
Sandrine Bailleux27fba522023-05-05 15:44:26 +0200105}
106#endif
107
108void tc_bl31_common_platform_setup(void)
109{
110 arm_bl31_platform_setup();
111
112#ifdef PLATFORM_TESTS
113 tc_run_platform_tests();
laurenw-arm481ac282023-05-03 12:48:55 -0500114#endif
Usama Arifbec5afd2020-04-17 16:13:39 +0100115}
116
117const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
118{
119 return css_scmi_override_pm_ops(ops);
120}
Usama Arifa49bd492021-08-17 17:57:10 +0100121
122void __init bl31_plat_arch_setup(void)
123{
124 arm_bl31_plat_arch_setup();
125
126 /* HW_CONFIG was also loaded by BL2 */
127 const struct dyn_cfg_dtb_info_t *hw_config_info;
128
129 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
130 assert(hw_config_info != NULL);
131
132 fconf_populate("HW_CONFIG", hw_config_info->config_addr);
133}
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500134
Govindraj Raja436ea5e2023-05-10 14:50:36 -0500135#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500136void tc_bl31_plat_runtime_setup(void)
137{
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500138 /* Start secure watchdog timer. */
139 plat_arm_secure_wdt_start();
Salman Nabi442b0752024-02-19 17:03:44 +0000140
141 arm_bl31_plat_runtime_setup();
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500142}
143
144void bl31_plat_runtime_setup(void)
145{
146 tc_bl31_plat_runtime_setup();
147}
148
149/*
150 * Platform handler for Group0 secure interrupt.
151 */
152int plat_spmd_handle_group0_interrupt(uint32_t intid)
153{
154 /* Trusted Watchdog timer is the only source of Group0 interrupt now. */
155 if (intid == SBSA_SECURE_WDOG_INTID) {
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500156 /* Refresh the timer. */
157 plat_arm_secure_wdt_refresh();
158
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500159 return 0;
160 }
161
162 return -1;
163}
Govindraj Raja436ea5e2023-05-10 14:50:36 -0500164#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/