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Soby Mathew7c6df5b2018-01-15 14:43:42 +00001/*
Achin Guptada6ef0e2019-10-11 14:54:48 +01002 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Soby Mathew7c6df5b2018-01-15 14:43:42 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008#include <string.h>
Louis Mayencourt73d42d72019-12-09 11:29:38 +00009#include <libfdt.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <platform_def.h>
12
13#include <common/debug.h>
14#include <common/desc_image_load.h>
15#include <common/tbbr/tbbr_img_def.h>
John Tsichritzisc34341a2018-07-30 13:41:52 +010016#if TRUSTED_BOARD_BOOT
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017#include <drivers/auth/mbedtls/mbedtls_config.h>
John Tsichritzisc34341a2018-07-30 13:41:52 +010018#endif
Louis Mayencourt6d2b5732019-12-17 13:17:25 +000019#include <lib/fconf/fconf.h>
20#include <lib/fconf/fconf_dyn_cfg_getter.h>
Louis Mayencourt5b9055f2019-10-01 10:45:14 +010021#include <lib/fconf/fconf_tbbr_getter.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000022#include <plat/arm/common/arm_dyn_cfg_helpers.h>
23#include <plat/arm/common/plat_arm.h>
Soby Mathew7c6df5b2018-01-15 14:43:42 +000024
John Tsichritzisc34341a2018-07-30 13:41:52 +010025#if TRUSTED_BOARD_BOOT
26
27static void *mbedtls_heap_addr;
28static size_t mbedtls_heap_size;
29
30/*
31 * This function is the implementation of the shared Mbed TLS heap between
32 * BL1 and BL2 for Arm platforms. The shared heap address is passed from BL1
33 * to BL2 with a pointer. This pointer resides inside the TB_FW_CONFIG file
34 * which is a DTB.
35 *
36 * This function is placed inside an #if directive for the below reasons:
37 * - To allocate space for the Mbed TLS heap --only if-- Trusted Board Boot
38 * is enabled.
39 * - This implementation requires the DTB to be present so that BL1 has a
Antonio Nino Diaz05f49572018-09-25 11:37:23 +010040 * mechanism to pass the pointer to BL2.
John Tsichritzisc34341a2018-07-30 13:41:52 +010041 */
42int arm_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
43{
44 assert(heap_addr != NULL);
45 assert(heap_size != NULL);
46
47#if defined(IMAGE_BL1) || BL2_AT_EL3
48
49 /* If in BL1 or BL2_AT_EL3 define a heap */
50 static unsigned char heap[TF_MBEDTLS_HEAP_SIZE];
51
52 *heap_addr = heap;
53 *heap_size = sizeof(heap);
54 mbedtls_heap_addr = heap;
55 mbedtls_heap_size = sizeof(heap);
56
57#elif defined(IMAGE_BL2)
58
John Tsichritzisc34341a2018-07-30 13:41:52 +010059 /* If in BL2, retrieve the already allocated heap's info from DTB */
Louis Mayencourt5b9055f2019-10-01 10:45:14 +010060 *heap_addr = FCONF_GET_PROPERTY(tbbr, dyn_config, mbedtls_heap_addr);
61 *heap_size = FCONF_GET_PROPERTY(tbbr, dyn_config, mbedtls_heap_size);
62
John Tsichritzisc34341a2018-07-30 13:41:52 +010063#endif
64
65 return 0;
66}
67
68/*
69 * Puts the shared Mbed TLS heap information to the DTB.
70 * Executed only from BL1.
71 */
72void arm_bl1_set_mbedtls_heap(void)
73{
74 int err;
Louis Mayencourt6d2b5732019-12-17 13:17:25 +000075 uintptr_t tb_fw_cfg_dtb;
John Tsichritzisc34341a2018-07-30 13:41:52 +010076
77 /*
78 * If tb_fw_cfg_dtb==NULL then DTB is not present for the current
79 * platform. As such, we don't attempt to write to the DTB at all.
80 *
81 * If mbedtls_heap_addr==NULL, then it means we are using the default
82 * heap implementation. As such, BL2 will have its own heap for sure
83 * and hence there is no need to pass any information to the DTB.
84 *
85 * In the latter case, if we still wanted to write in the DTB the heap
86 * information, we would need to call plat_get_mbedtls_heap to retrieve
87 * the default heap's address and size.
88 */
Louis Mayencourt6d2b5732019-12-17 13:17:25 +000089
90 /* fconf FW_CONFIG and TB_FW_CONFIG are currently the same DTB*/
91 tb_fw_cfg_dtb = FCONF_GET_PROPERTY(fconf, dtb, base_addr);
92
93 if ((tb_fw_cfg_dtb != 0UL) && (mbedtls_heap_addr != NULL)) {
94 /* As libfdt use void *, we can't avoid this cast */
95 void *dtb = (void *)tb_fw_cfg_dtb;
96
97 err = arm_set_dtb_mbedtls_heap_info(dtb,
John Tsichritzisc34341a2018-07-30 13:41:52 +010098 mbedtls_heap_addr, mbedtls_heap_size);
99 if (err < 0) {
John Tsichritzis36507682018-09-07 10:42:37 +0100100 ERROR("BL1: unable to write shared Mbed TLS heap information to DTB\n");
John Tsichritzisc34341a2018-07-30 13:41:52 +0100101 panic();
102 }
John Tsichritzis03459c22018-09-07 10:52:12 +0100103 /*
104 * Ensure that the info written to the DTB is visible to other
105 * images. It's critical because BL2 won't be able to proceed
106 * without the heap info.
107 */
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000108 flush_dcache_range(tb_fw_cfg_dtb, fdt_totalsize(dtb));
John Tsichritzisc34341a2018-07-30 13:41:52 +0100109 }
110}
111
112#endif /* TRUSTED_BOARD_BOOT */
113
Soby Mathew7c6df5b2018-01-15 14:43:42 +0000114/*
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000115 * BL2 utility function to initialize dynamic configuration specified by
Soby Mathewb6814842018-04-04 09:40:32 +0100116 * TB_FW_CONFIG. Populate the bl_mem_params_node_t of other FW_CONFIGs if
117 * specified in TB_FW_CONFIG.
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000118 */
119void arm_bl2_dyn_cfg_init(void)
120{
Soby Mathewb6814842018-04-04 09:40:32 +0100121 unsigned int i;
122 bl_mem_params_node_t *cfg_mem_params = NULL;
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000123 uintptr_t image_base;
124 size_t image_size;
Soby Mathewb6814842018-04-04 09:40:32 +0100125 const unsigned int config_ids[] = {
126 HW_CONFIG_ID,
127 SOC_FW_CONFIG_ID,
128 NT_FW_CONFIG_ID,
Achin Guptada6ef0e2019-10-11 14:54:48 +0100129#if defined(SPD_tspd) || defined(SPD_spmd)
130 /* tos_fw_config is only present for TSPD/SPMD */
Soby Mathewb6814842018-04-04 09:40:32 +0100131 TOS_FW_CONFIG_ID
132#endif
133 };
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000134
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000135 const struct dyn_cfg_dtb_info_t *dtb_info;
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000136
Soby Mathewb6814842018-04-04 09:40:32 +0100137 /* Iterate through all the fw config IDs */
138 for (i = 0; i < ARRAY_SIZE(config_ids); i++) {
139 /* Get the config load address and size from TB_FW_CONFIG */
140 cfg_mem_params = get_bl_mem_params_node(config_ids[i]);
141 if (cfg_mem_params == NULL) {
142 VERBOSE("Couldn't find HW_CONFIG in bl_mem_params_node\n");
143 continue;
144 }
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000145
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000146 dtb_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, config_ids[i]);
147 if (dtb_info == NULL) {
Soby Mathewb6814842018-04-04 09:40:32 +0100148 VERBOSE("Couldn't find config_id %d load info in TB_FW_CONFIG\n",
149 config_ids[i]);
150 continue;
151 }
152
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000153 image_base = dtb_info->config_addr;
154 image_size = dtb_info->config_max_size;
155
Soby Mathewb6814842018-04-04 09:40:32 +0100156 /*
157 * Do some runtime checks on the load addresses of soc_fw_config,
158 * tos_fw_config, nt_fw_config. This is not a comprehensive check
159 * of all invalid addresses but to prevent trivial porting errors.
160 */
161 if (config_ids[i] != HW_CONFIG_ID) {
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000162
Antonio Nino Diazb5acb3f2018-10-30 16:32:48 +0000163 if (check_uptr_overflow(image_base, image_size))
Soby Mathewb6814842018-04-04 09:40:32 +0100164 continue;
165
Usama Arife97998f2018-11-30 15:43:56 +0000166#ifdef BL31_BASE
Soby Mathewaf14b462018-06-01 16:53:38 +0100167 /* Ensure the configs don't overlap with BL31 */
Alexei Fedorov91e20c82019-12-19 11:59:31 +0000168 if ((image_base >= BL31_BASE) &&
169 (image_base <= BL31_LIMIT))
Soby Mathewb6814842018-04-04 09:40:32 +0100170 continue;
Usama Arife97998f2018-11-30 15:43:56 +0000171#endif
Soby Mathewb6814842018-04-04 09:40:32 +0100172 /* Ensure the configs are loaded in a valid address */
173 if (image_base < ARM_BL_RAM_BASE)
174 continue;
175#ifdef BL32_BASE
176 /*
177 * If BL32 is present, ensure that the configs don't
178 * overlap with it.
179 */
Alexei Fedorov91e20c82019-12-19 11:59:31 +0000180 if ((image_base >= BL32_BASE) &&
181 (image_base <= BL32_LIMIT))
Soby Mathewb6814842018-04-04 09:40:32 +0100182 continue;
183#endif
184 }
185
186
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000187 cfg_mem_params->image_info.image_base = image_base;
188 cfg_mem_params->image_info.image_max_size = (uint32_t)image_size;
Soby Mathewb6814842018-04-04 09:40:32 +0100189
Alexei Fedorov91e20c82019-12-19 11:59:31 +0000190 /*
191 * Remove the IMAGE_ATTRIB_SKIP_LOADING attribute from
192 * HW_CONFIG or FW_CONFIG nodes
193 */
Soby Mathewb6814842018-04-04 09:40:32 +0100194 cfg_mem_params->image_info.h.attr &= ~IMAGE_ATTRIB_SKIP_LOADING;
195 }
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000196}