| Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <common/bl_common.h> |
| 8 | #include <common/desc_image_load.h> |
| 9 | #include <plat/common/platform.h> |
| 10 | |
| 11 | #include <platform_def.h> |
| 12 | |
| 13 | /******************************************************************************* |
| 14 | * Following descriptor provides BL image/ep information that gets used |
| 15 | * by BL2 to load the images and also subset of this information is |
| 16 | * passed to next BL image. The image loading sequence is managed by |
| 17 | * populating the images in required loading order. The image execution |
| 18 | * sequence is managed by populating the `next_handoff_image_id` with |
| 19 | * the next executable image id. |
| 20 | ******************************************************************************/ |
| 21 | static bl_mem_params_node_t bl2_mem_params_descs[] = { |
| 22 | /* Fill BL32 related information */ |
| 23 | { |
| 24 | .image_id = BL32_IMAGE_ID, |
| 25 | |
| 26 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 27 | VERSION_2, entry_point_info_t, |
| 28 | SECURE | EXECUTABLE | EP_FIRST_EXE), |
| 29 | |
| 30 | /* Updated at runtime if OP-TEE is loaded */ |
| 31 | .ep_info.pc = STM32MP_BL32_BASE, |
| 32 | |
| 33 | .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, |
| 34 | SPSR_E_LITTLE, |
| 35 | DISABLE_ALL_EXCEPTIONS), |
| 36 | |
| 37 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 38 | VERSION_2, image_info_t, |
| 39 | IMAGE_ATTRIB_PLAT_SETUP), |
| 40 | |
| 41 | /* Updated at runtime if OP-TEE is loaded */ |
| 42 | .image_info.image_base = STM32MP_BL32_BASE, |
| 43 | .image_info.image_max_size = STM32MP_BL32_SIZE, |
| 44 | |
| 45 | .next_handoff_image_id = BL33_IMAGE_ID, |
| 46 | }, |
| 47 | |
| 48 | #if defined(AARCH32_SP_OPTEE) |
| 49 | /* Fill BL32 external 1 image related information */ |
| 50 | { |
| 51 | .image_id = BL32_EXTRA1_IMAGE_ID, |
| 52 | |
| 53 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 54 | VERSION_2, entry_point_info_t, |
| 55 | SECURE | NON_EXECUTABLE), |
| 56 | |
| 57 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 58 | VERSION_2, image_info_t, |
| 59 | IMAGE_ATTRIB_SKIP_LOADING), |
| 60 | |
| 61 | .next_handoff_image_id = INVALID_IMAGE_ID, |
| 62 | }, |
| 63 | /* Fill BL32 external 2 image related information */ |
| 64 | { |
| 65 | .image_id = BL32_EXTRA2_IMAGE_ID, |
| 66 | |
| 67 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 68 | VERSION_2, entry_point_info_t, |
| 69 | SECURE | NON_EXECUTABLE), |
| 70 | |
| 71 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 72 | VERSION_2, image_info_t, |
| 73 | IMAGE_ATTRIB_SKIP_LOADING), |
| 74 | |
| 75 | .next_handoff_image_id = INVALID_IMAGE_ID, |
| 76 | }, |
| 77 | #endif /* AARCH32_SP_OPTEE */ |
| 78 | |
| 79 | /* Fill BL33 related information */ |
| 80 | { |
| 81 | .image_id = BL33_IMAGE_ID, |
| 82 | |
| 83 | SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, |
| 84 | VERSION_2, entry_point_info_t, |
| 85 | NON_SECURE | EXECUTABLE), |
| 86 | |
| 87 | .ep_info.pc = PLAT_STM32MP_NS_IMAGE_OFFSET, |
| 88 | .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, |
| 89 | SPSR_E_LITTLE, |
| 90 | DISABLE_ALL_EXCEPTIONS), |
| 91 | |
| 92 | SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, |
| 93 | VERSION_2, image_info_t, 0U), |
| 94 | |
| 95 | .image_info.image_base = PLAT_STM32MP_NS_IMAGE_OFFSET, |
| 96 | .image_info.image_max_size = STM32MP_DDR_MAX_SIZE - |
| 97 | (PLAT_STM32MP_NS_IMAGE_OFFSET - STM32MP_DDR_BASE), |
| 98 | |
| 99 | .next_handoff_image_id = INVALID_IMAGE_ID, |
| 100 | } |
| 101 | }; |
| 102 | |
| 103 | REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs) |