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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
Soren Brinkmann76fcae32016-03-06 20:16:27 -08007#include <assert.h>
Isla Mitchelle3631462017-07-14 10:46:32 +01008#include <errno.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
10#include <arch_helpers.h>
11#include <common/debug.h>
12#include <drivers/arm/gicv2.h>
13#include <lib/mmio.h>
14#include <lib/psci/psci.h>
15#include <plat/common/platform.h>
16
Soren Brinkmann76fcae32016-03-06 20:16:27 -080017#include <plat_arm.h>
Soren Brinkmann76fcae32016-03-06 20:16:27 -080018#include "pm_api_sys.h"
19#include "pm_client.h"
20#include "zynqmp_private.h"
21
22uintptr_t zynqmp_sec_entry;
23
24void zynqmp_cpu_standby(plat_local_state_t cpu_state)
25{
26 VERBOSE("%s: cpu_state: 0x%x\n", __func__, cpu_state);
27
28 dsb();
29 wfi();
30}
31
Soren Brinkmann76fcae32016-03-06 20:16:27 -080032static int zynqmp_pwr_domain_on(u_register_t mpidr)
33{
34 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);
35 const struct pm_proc *proc;
36
37 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
38
39 if (cpu_id == -1)
40 return PSCI_E_INTERN_FAIL;
41
42 proc = pm_get_proc(cpu_id);
Filip Drazicd7d62ce2017-02-07 12:03:56 +010043 /* Clear power down request */
44 pm_client_wakeup(proc);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080045
46 /* Send request to PMU to wake up selected APU CPU core */
Soren Brinkmann17aea222016-05-19 07:20:14 -070047 pm_req_wakeup(proc->node_id, 1, zynqmp_sec_entry, REQ_ACK_BLOCKING);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080048
49 return PSCI_E_SUCCESS;
50}
51
Soren Brinkmann76fcae32016-03-06 20:16:27 -080052static void zynqmp_pwr_domain_off(const psci_power_state_t *target_state)
53{
54 unsigned int cpu_id = plat_my_core_pos();
55 const struct pm_proc *proc = pm_get_proc(cpu_id);
56
57 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
58 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
59 __func__, i, target_state->pwr_domain_state[i]);
60
61 /* Prevent interrupts from spuriously waking up this cpu */
62 gicv2_cpuif_disable();
63
64 /*
65 * Send request to PMU to power down the appropriate APU CPU
66 * core.
67 * According to PSCI specification, CPU_off function does not
68 * have resume address and CPU core can only be woken up
69 * invoking CPU_on function, during which resume address will
70 * be set.
71 */
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020072 pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080073}
74
Soren Brinkmann76fcae32016-03-06 20:16:27 -080075static void zynqmp_pwr_domain_suspend(const psci_power_state_t *target_state)
76{
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020077 unsigned int state;
Soren Brinkmann76fcae32016-03-06 20:16:27 -080078 unsigned int cpu_id = plat_my_core_pos();
79 const struct pm_proc *proc = pm_get_proc(cpu_id);
80
81 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
82 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
83 __func__, i, target_state->pwr_domain_state[i]);
84
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020085 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
86 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
87
Soren Brinkmann76fcae32016-03-06 20:16:27 -080088 /* Send request to PMU to suspend this core */
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020089 pm_self_suspend(proc->node_id, MAX_LATENCY, state, zynqmp_sec_entry);
Soren Brinkmann76fcae32016-03-06 20:16:27 -080090
91 /* APU is to be turned off */
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
Soren Brinkmann76fcae32016-03-06 20:16:27 -080093 /* disable coherency */
94 plat_arm_interconnect_exit_coherency();
95 }
96}
97
98static void zynqmp_pwr_domain_on_finish(const psci_power_state_t *target_state)
99{
100 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
101 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
102 __func__, i, target_state->pwr_domain_state[i]);
103
104 gicv2_cpuif_enable();
105 gicv2_pcpu_distif_init();
106}
107
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800108static void zynqmp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
109{
110 unsigned int cpu_id = plat_my_core_pos();
111 const struct pm_proc *proc = pm_get_proc(cpu_id);
112
113 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
114 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
115 __func__, i, target_state->pwr_domain_state[i]);
116
117 /* Clear the APU power control register for this cpu */
118 pm_client_wakeup(proc);
119
120 /* enable coherency */
121 plat_arm_interconnect_enter_coherency();
Soren Brinkmann3b6ebcb2016-02-18 21:16:35 -0800122 /* APU was turned off */
123 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
124 plat_arm_gic_init();
125 } else {
126 gicv2_cpuif_enable();
127 gicv2_pcpu_distif_init();
128 }
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800129}
130
131/*******************************************************************************
132 * ZynqMP handlers to shutdown/reboot the system
133 ******************************************************************************/
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800134
135static void __dead2 zynqmp_system_off(void)
136{
137 /* disable coherency */
138 plat_arm_interconnect_exit_coherency();
139
140 /* Send the power down request to the PMU */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700141 pm_system_shutdown(PMF_SHUTDOWN_TYPE_SHUTDOWN,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530142 pm_get_shutdown_scope());
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800143
144 while (1)
145 wfi();
146}
147
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800148static void __dead2 zynqmp_system_reset(void)
149{
150 /* disable coherency */
151 plat_arm_interconnect_exit_coherency();
152
153 /* Send the system reset request to the PMU */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700154 pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530155 pm_get_shutdown_scope());
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800156
157 while (1)
158 wfi();
159}
160
161int zynqmp_validate_power_state(unsigned int power_state,
162 psci_power_state_t *req_state)
163{
164 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
165
Stefan Krsmanovic3779c5c2016-05-09 18:00:47 +0200166 int pstate = psci_get_pstate_type(power_state);
167
168 assert(req_state);
169
170 /* Sanity check the requested state */
171 if (pstate == PSTATE_TYPE_STANDBY)
172 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
173 else
174 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
175
176 /* We expect the 'state id' to be zero */
177 if (psci_get_pstate_id(power_state))
178 return PSCI_E_INVALID_PARAMS;
179
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800180 return PSCI_E_SUCCESS;
181}
182
183int zynqmp_validate_ns_entrypoint(unsigned long ns_entrypoint)
184{
185 VERBOSE("%s: ns_entrypoint: 0x%lx\n", __func__, ns_entrypoint);
186
187 /* FIXME: Actually validate */
188 return PSCI_E_SUCCESS;
189}
190
191void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state)
192{
193 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
194 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
195}
196
197/*******************************************************************************
198 * Export the platform handlers to enable psci to invoke them
199 ******************************************************************************/
200static const struct plat_psci_ops zynqmp_psci_ops = {
201 .cpu_standby = zynqmp_cpu_standby,
202 .pwr_domain_on = zynqmp_pwr_domain_on,
203 .pwr_domain_off = zynqmp_pwr_domain_off,
204 .pwr_domain_suspend = zynqmp_pwr_domain_suspend,
205 .pwr_domain_on_finish = zynqmp_pwr_domain_on_finish,
206 .pwr_domain_suspend_finish = zynqmp_pwr_domain_suspend_finish,
207 .system_off = zynqmp_system_off,
208 .system_reset = zynqmp_system_reset,
209 .validate_power_state = zynqmp_validate_power_state,
210 .validate_ns_entrypoint = zynqmp_validate_ns_entrypoint,
211 .get_sys_suspend_power_state = zynqmp_get_sys_suspend_power_state,
212};
213
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800214/*******************************************************************************
215 * Export the platform specific power ops.
216 ******************************************************************************/
217int plat_setup_psci_ops(uintptr_t sec_entrypoint,
218 const struct plat_psci_ops **psci_ops)
219{
220 zynqmp_sec_entry = sec_entrypoint;
221
Siva Durga Prasad Paladugu40808bc2018-04-30 19:43:03 +0530222 *psci_ops = &zynqmp_psci_ops;
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800223
224 return 0;
225}