blob: a8c1b7769a50c324fae4f37f056adaa61157d48c [file] [log] [blame]
Yann Gautiercaf575b2018-07-24 17:18:19 +02001/*
2 * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautiercaf575b2018-07-24 17:18:19 +02007#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <drivers/st/stm32mp1_ddr_helpers.h>
10#include <drivers/st/stm32mp1_rcc.h>
11#include <lib/mmio.h>
Yann Gautiercaf575b2018-07-24 17:18:19 +020012
13void ddr_enable_clock(void)
14{
15 mmio_setbits_32(RCC_BASE + RCC_DDRITFCR,
16 RCC_DDRITFCR_DDRC1EN |
17 RCC_DDRITFCR_DDRC2EN |
18 RCC_DDRITFCR_DDRPHYCEN |
19 RCC_DDRITFCR_DDRPHYCAPBEN |
20 RCC_DDRITFCR_DDRCAPBEN);
21}