blob: 0a50438b9307db34c755b4852e217359df5c257d [file] [log] [blame]
Nicolas Toromanoffda968b12020-09-18 09:19:11 +02001/*
2 * Copyright (c) 2022, STMicroelectronics - All Rights Reserved
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef STM32_SAES_H
8#define STM32_SAES_H
9
10#include <stdbool.h>
11#include <stddef.h>
12#include <stdint.h>
13
14#define DT_SAES_COMPAT "st,stm32-saes"
15
16struct stm32_saes_platdata {
17 uintptr_t base;
18 unsigned long clock_id;
19 unsigned int reset_id;
20};
21
22enum stm32_saes_chaining_mode {
23 STM32_SAES_MODE_ECB,
24 STM32_SAES_MODE_CBC,
25 STM32_SAES_MODE_CTR,
26 STM32_SAES_MODE_GCM,
27 STM32_SAES_MODE_CCM, /* Not use in TF-A */
28};
29
30enum stm32_saes_key_selection {
31 STM32_SAES_KEY_SOFT,
32 STM32_SAES_KEY_DHU, /* Derived HW unique key */
33 STM32_SAES_KEY_BH, /* Boot HW key */
34 STM32_SAES_KEY_BHU_XOR_BH, /* XOR of DHUK and BHK */
35 STM32_SAES_KEY_WRAPPED
36};
37
38struct stm32_saes_context {
39 uintptr_t base;
40 uint32_t cr;
41 uint32_t assoc_len;
42 uint32_t load_len;
43 uint32_t key[8]; /* In HW byte order */
44 uint32_t iv[4]; /* In HW byte order */
45};
46
47int stm32_saes_driver_init(void);
48
49int stm32_saes_init(struct stm32_saes_context *ctx, bool is_decrypt,
50 enum stm32_saes_chaining_mode ch_mode, enum stm32_saes_key_selection key_select,
51 const void *key, size_t key_len, const void *iv, size_t iv_len);
52int stm32_saes_update(struct stm32_saes_context *ctx, bool last_block,
53 uint8_t *data_in, uint8_t *data_out, size_t data_len);
54int stm32_saes_update_assodata(struct stm32_saes_context *ctx, bool last_block,
55 uint8_t *data, size_t data_len);
56int stm32_saes_update_load(struct stm32_saes_context *ctx, bool last_block,
57 uint8_t *data_in, uint8_t *data_out, size_t data_len);
58int stm32_saes_final(struct stm32_saes_context *ctx, uint8_t *tag, size_t tag_len);
59#endif