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Yann Gautier4ede20a2020-09-18 15:04:14 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
Yann Gautier62944662021-11-02 15:06:01 +01003 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
Yann Gautier4ede20a2020-09-18 15:04:14 +02004 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9 fmc_pins_a: fmc-0 {
10 pins1 {
11 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
12 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
13 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
14 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
15 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
16 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
17 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
18 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
19 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
20 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
21 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
22 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
23 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
24 bias-disable;
25 drive-push-pull;
26 slew-rate = <1>;
27 };
28 pins2 {
29 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
30 bias-pull-up;
31 };
32 };
33
Grzegorz Szymaszek6f651352021-04-21 19:16:43 +020034 i2c2_pins_a: i2c2-0 {
35 pins {
36 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
37 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
38 bias-disable;
39 drive-open-drain;
40 slew-rate = <0>;
41 };
42 };
43
Yann Gautier4ede20a2020-09-18 15:04:14 +020044 qspi_clk_pins_a: qspi-clk-0 {
45 pins {
46 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
47 bias-disable;
48 drive-push-pull;
49 slew-rate = <3>;
50 };
51 };
52
53 qspi_bk1_pins_a: qspi-bk1-0 {
54 pins1 {
55 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
56 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
57 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
58 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
59 bias-disable;
60 drive-push-pull;
61 slew-rate = <1>;
62 };
63 pins2 {
64 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
65 bias-pull-up;
66 drive-push-pull;
67 slew-rate = <1>;
68 };
69 };
70
71 qspi_bk2_pins_a: qspi-bk2-0 {
72 pins1 {
73 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
74 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
75 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
76 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
77 bias-disable;
78 drive-push-pull;
79 slew-rate = <1>;
80 };
81 pins2 {
82 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
83 bias-pull-up;
84 drive-push-pull;
85 slew-rate = <1>;
86 };
87 };
88
Yann Gautier4ede20a2020-09-18 15:04:14 +020089 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
90 pins1 {
91 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
92 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
93 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
94 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
95 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
96 slew-rate = <1>;
97 drive-push-pull;
98 bias-disable;
99 };
100 pins2 {
101 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
102 slew-rate = <2>;
103 drive-push-pull;
104 bias-disable;
105 };
106 };
107
108 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
109 pins1 {
110 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
111 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
112 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
113 slew-rate = <1>;
114 drive-push-pull;
115 bias-pull-up;
116 };
Johann Neuhausera5ef16a2022-07-08 15:22:05 +0200117 pins2 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200118 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
119 bias-pull-up;
120 };
121 };
122
Johann Neuhauser5ae969b2022-07-13 12:04:21 +0200123 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
124 pins1 {
125 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
126 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
127 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
128 slew-rate = <1>;
129 drive-push-pull;
130 bias-pull-up;
131 };
132 pins2{
133 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
134 bias-pull-up;
135 };
136 };
137
Yann Gautier4ede20a2020-09-18 15:04:14 +0200138 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
139 pins1 {
140 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
141 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
142 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
143 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
144 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
145 slew-rate = <1>;
146 drive-push-pull;
147 bias-pull-up;
148 };
149 pins2 {
150 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
151 slew-rate = <2>;
152 drive-push-pull;
153 bias-pull-up;
154 };
155 };
156
157 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
158 pins1 {
159 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
160 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
161 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
162 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
163 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
164 slew-rate = <1>;
165 drive-push-pull;
166 bias-disable;
167 };
168 pins2 {
169 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
170 slew-rate = <2>;
171 drive-push-pull;
172 bias-disable;
173 };
174 };
175
176 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
177 pins {
178 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
179 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
180 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
181 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
182 slew-rate = <1>;
183 drive-push-pull;
184 bias-pull-up;
185 };
186 };
187
Yann Gautierbb053d52021-10-20 17:22:32 +0200188 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
189 pins {
190 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
191 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
192 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
193 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
194 slew-rate = <1>;
195 drive-push-pull;
196 bias-disable;
197 };
198 };
199
Johann Neuhauser5ae969b2022-07-13 12:04:21 +0200200 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
201 pins {
202 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
203 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
204 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
205 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
206 slew-rate = <1>;
207 drive-push-pull;
208 bias-pull-up;
209 };
210 };
211
Grzegorz Szymaszek6f632672021-04-21 19:30:50 +0200212 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
213 pins {
214 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
215 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
216 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
217 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
218 };
219 };
220
Yann Gautier4ede20a2020-09-18 15:04:14 +0200221 uart4_pins_a: uart4-0 {
222 pins1 {
223 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
224 bias-disable;
225 drive-push-pull;
226 slew-rate = <0>;
227 };
228 pins2 {
229 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
230 bias-disable;
231 };
232 };
233
234 uart4_pins_b: uart4-1 {
235 pins1 {
236 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
237 bias-disable;
238 drive-push-pull;
239 slew-rate = <0>;
240 };
241 pins2 {
242 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
243 bias-disable;
244 };
245 };
246
247 uart7_pins_a: uart7-0 {
248 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200249 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200250 bias-disable;
251 drive-push-pull;
252 slew-rate = <0>;
253 };
254 pins2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200255 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
256 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
257 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200258 bias-disable;
259 };
260 };
261
262 uart7_pins_b: uart7-1 {
263 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200264 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
265 bias-disable;
266 drive-push-pull;
267 slew-rate = <0>;
268 };
269 pins2 {
270 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
271 bias-disable;
272 };
273 };
274
275 uart7_pins_c: uart7-2 {
276 pins1 {
277 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200278 bias-disable;
279 drive-push-pull;
280 slew-rate = <0>;
281 };
282 pins2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200283 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200284 bias-disable;
285 };
286 };
287
Yann Gautierbb053d52021-10-20 17:22:32 +0200288 uart8_pins_a: uart8-0 {
289 pins1 {
290 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
291 bias-disable;
292 drive-push-pull;
293 slew-rate = <0>;
294 };
295 pins2 {
296 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
297 bias-disable;
298 };
299 };
300
Yann Gautier4ede20a2020-09-18 15:04:14 +0200301 usart2_pins_a: usart2-0 {
302 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200303 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
304 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
305 bias-disable;
306 drive-push-pull;
307 slew-rate = <0>;
308 };
309 pins2 {
310 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
311 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
312 bias-disable;
313 };
314 };
315
316 usart2_pins_b: usart2-1 {
317 pins1 {
318 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
319 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
320 bias-disable;
321 drive-push-pull;
322 slew-rate = <0>;
323 };
324 pins2 {
325 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
326 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
327 bias-disable;
328 };
329 };
330
331 usart2_pins_c: usart2-2 {
332 pins1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200333 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
334 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
335 bias-disable;
336 drive-push-pull;
337 slew-rate = <3>;
338 };
339 pins2 {
340 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
341 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
342 bias-disable;
343 };
344 };
345
346 usart3_pins_a: usart3-0 {
347 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200348 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
349 bias-disable;
350 drive-push-pull;
351 slew-rate = <0>;
352 };
353 pins2 {
354 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
355 bias-disable;
356 };
357 };
358
359 usart3_pins_b: usart3-1 {
360 pins1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200361 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
362 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
363 bias-disable;
364 drive-push-pull;
365 slew-rate = <0>;
366 };
367 pins2 {
368 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
369 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
370 bias-disable;
371 };
372 };
373
Yann Gautierbb053d52021-10-20 17:22:32 +0200374 usart3_pins_c: usart3-2 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200375 pins1 {
376 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
377 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
378 bias-disable;
379 drive-push-pull;
380 slew-rate = <0>;
381 };
382 pins2 {
383 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
384 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
385 bias-disable;
386 };
387 };
388
Yann Gautierbb053d52021-10-20 17:22:32 +0200389 usbotg_hs_pins_a: usbotg-hs-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200390 pins {
391 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
392 };
393 };
394
395 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
396 pins {
397 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
398 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
399 };
400 };
401};
402
403&pinctrl_z {
404 i2c4_pins_a: i2c4-0 {
405 pins {
406 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
407 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
408 bias-disable;
409 drive-open-drain;
410 slew-rate = <0>;
411 };
412 };
413};