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Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05301/*
Abhyuday Godhasara096f5cc2021-08-13 06:45:32 -07002 * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00006
Tejas Patel69409962018-12-14 00:55:29 -08007#include <plat_private.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008#include <plat/common/platform.h>
9
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053010int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053011{
Abhyuday Godhasarabacbdee2021-08-20 00:27:03 -070012 if ((mpidr & MPIDR_CLUSTER_MASK) != 0U) {
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053013 return -1;
Venkatesh Yadav Abbarapu5f115db2021-01-10 20:40:16 -070014 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053015
Venkatesh Yadav Abbarapu5f115db2021-01-10 20:40:16 -070016 if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) {
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053017 return -1;
Venkatesh Yadav Abbarapu5f115db2021-01-10 20:40:16 -070018 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053019
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053020 return (int32_t)versal_calc_core_pos(mpidr);
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053021}