blob: f5b31b43c2e5da824aadcd5be5c6ad00e58b5a42 [file] [log] [blame]
Olivier Deprezbcaa0682020-04-01 21:28:26 +02001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6/dts-v1/;
7
8#define AFF 00
9
10#include "fvp-defs.dtsi"
11#undef POST
12#define POST \
13 };
14
15/ {
16 compatible = "arm,ffa-core-manifest-1.0";
17 #address-cells = <2>;
18 #size-cells = <1>;
19
20 attribute {
21 spmc_id = <0x8000>;
22 maj_ver = <0x1>;
23 min_ver = <0x0>;
24 exec_state = <0x0>;
25 load_address = <0x0 0x6000000>;
26 entrypoint = <0x0 0x6000000>;
27 binary_size = <0x80000>;
28 };
29
30 chosen {
31 linux,initrd-start = <0>;
32 linux,initrd-end = <0>;
33 };
34
35 hypervisor {
36 compatible = "hafnium,hafnium";
37 vm1 {
38 is_ffa_partition;
39 debug_name = "op-tee";
40 load_address = <0x6280000>;
41 smc_whitelist = <0xbe000000>;
42 };
43 };
44
45 cpus {
46 #address-cells = <0x2>;
47 #size-cells = <0x0>;
48
49 CPU_0
50
51 /*
52 * SPMC(Hafnium) requires secondary core nodes are declared
53 * in descending order.
54 */
55 CPU_7
56 CPU_6
57 CPU_5
58 CPU_4
59 CPU_3
60 CPU_2
61 CPU_1
62 };
63
64 memory@60000000 {
65 device_type = "memory";
66 reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
67 };
68};