| Varun Wadekar | 0f3baa0 | 2015-07-16 11:36:33 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <xlat_tables.h> |
| 32 | #include <tegra_def.h> |
| 33 | |
| 34 | /* sets of MMIO ranges setup */ |
| 35 | #define MMIO_RANGE_0_ADDR 0x50000000 |
| 36 | #define MMIO_RANGE_1_ADDR 0x60000000 |
| 37 | #define MMIO_RANGE_2_ADDR 0x70000000 |
| 38 | #define MMIO_RANGE_SIZE 0x200000 |
| 39 | |
| 40 | /* |
| 41 | * Table of regions to map using the MMU. |
| 42 | */ |
| 43 | static const mmap_region_t tegra_mmap[] = { |
| 44 | MAP_REGION_FLAT(MMIO_RANGE_0_ADDR, MMIO_RANGE_SIZE, |
| 45 | MT_DEVICE | MT_RW | MT_SECURE), |
| 46 | MAP_REGION_FLAT(MMIO_RANGE_1_ADDR, MMIO_RANGE_SIZE, |
| 47 | MT_DEVICE | MT_RW | MT_SECURE), |
| 48 | MAP_REGION_FLAT(MMIO_RANGE_2_ADDR, MMIO_RANGE_SIZE, |
| 49 | MT_DEVICE | MT_RW | MT_SECURE), |
| 50 | {0} |
| 51 | }; |
| 52 | |
| 53 | /******************************************************************************* |
| 54 | * Set up the pagetables as per the platform memory map & initialize the MMU |
| 55 | ******************************************************************************/ |
| 56 | const mmap_region_t *plat_get_mmio_map(void) |
| 57 | { |
| 58 | /* MMIO space */ |
| 59 | return tegra_mmap; |
| 60 | } |
| 61 | |
| 62 | uint64_t plat_get_syscnt_freq(void) |
| 63 | { |
| 64 | return 12000000; |
| 65 | } |