| Aditya Angadi | e650895 | 2019-07-21 22:13:45 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <plat/arm/common/plat_arm.h> |
| 8 | #include <plat/arm/css/common/css_pm.h> |
| 9 | |
| 10 | /****************************************************************************** |
| 11 | * The power domain tree descriptor. |
| 12 | ******************************************************************************/ |
| 13 | const unsigned char rd_daniel_pd_tree_desc[] = { |
| 14 | PLAT_ARM_CLUSTER_COUNT, |
| 15 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 16 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 17 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 18 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 19 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 20 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 21 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 22 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 23 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 24 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 25 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 26 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 27 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 28 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 29 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 30 | CSS_SGI_MAX_CPUS_PER_CLUSTER |
| 31 | }; |
| 32 | |
| 33 | /******************************************************************************* |
| 34 | * This function returns the topology tree information. |
| 35 | ******************************************************************************/ |
| 36 | const unsigned char *plat_get_power_domain_tree_desc(void) |
| 37 | { |
| 38 | return rd_daniel_pd_tree_desc; |
| 39 | } |
| 40 | |
| 41 | /******************************************************************************* |
| 42 | * The array mapping platform core position (implemented by plat_my_core_pos()) |
| 43 | * to the SCMI power domain ID implemented by SCP. |
| 44 | ******************************************************************************/ |
| 45 | const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = { |
| 46 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)), |
| 47 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)), |
| 48 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)), |
| 49 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)), |
| 50 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x4)), |
| 51 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)), |
| 52 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)), |
| 53 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)), |
| 54 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)), |
| 55 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)), |
| 56 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)), |
| 57 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xB)), |
| 58 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xC)), |
| 59 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)), |
| 60 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xE)), |
| 61 | (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xF)) |
| 62 | }; |