| Tony Xie | 42e113e | 2016-07-16 11:16:51 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 15 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 18 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 19 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 20 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 21 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 22 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 23 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 24 | * POSSIBILITY OF SUCH DAMAGE. |
| 25 | */ |
| 26 | |
| 27 | #include <arch.h> |
| 28 | #include <asm_macros.S> |
| 29 | #include <platform_def.h> |
| 30 | |
| 31 | .globl clst_warmboot_data |
| 32 | |
| 33 | #define PLL_MODE_SHIFT (0x8) |
| 34 | #define PLL_NORMAL_MODE ((0x3 << (PLL_MODE_SHIFT + 16)) | \ |
| 35 | (0x1 << PLL_MODE_SHIFT)) |
| 36 | #define MPIDR_CLST_L_BITS 0x0 |
| 37 | /* |
| 38 | * For different socs, if we want to speed up warmboot, |
| 39 | * we need to config some regs here. |
| 40 | * If scu was suspend, we must resume related clk |
| 41 | * from slow (24M) mode to normal mode first. |
| 42 | * X0: MPIDR_EL1 & MPIDR_CLUSTER_MASK |
| 43 | */ |
| 44 | .macro func_rockchip_clst_warmboot |
| 45 | adr x4, clst_warmboot_data |
| 46 | lsr x5, x0, #6 |
| 47 | ldr w3, [x4, x5] |
| 48 | str wzr, [x4, x5] |
| 49 | cmp w3, #PMU_CLST_RET |
| 50 | b.ne clst_warmboot_end |
| 51 | ldr w6, =(PLL_NORMAL_MODE) |
| 52 | /* |
| 53 | * core_l offset is CRU_BASE + 0xc, |
| 54 | * core_b offset is CRU_BASE + 0x2c |
| 55 | */ |
| 56 | ldr x7, =(CRU_BASE + 0xc) |
| 57 | lsr x2, x0, #3 |
| 58 | str w6, [x7, x2] |
| 59 | clst_warmboot_end: |
| 60 | .endm |
| 61 | |
| 62 | .macro rockchip_clst_warmboot_data |
| 63 | clst_warmboot_data: |
| 64 | .rept PLATFORM_CLUSTER_COUNT |
| 65 | .word 0 |
| 66 | .endr |
| 67 | .endm |