blob: e805c9a38594f41826feead5f62050ca92d581f4 [file] [log] [blame]
Yatharth Kochar736a3bf2015-10-11 14:14:55 +01001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <bl_common.h>
32#include <errno.h>
33#include <platform.h>
34#include <plat_arm.h>
35#include <tbbr_img_def.h>
36#include <v2m_def.h>
37
38#define RESET_REASON_WDOG_RESET (0x2)
39
40/*******************************************************************************
41 * The following function checks if Firmware update is needed,
42 * by checking if TOC in FIP image is valid or watchdog reset happened.
43 ******************************************************************************/
44unsigned int bl1_plat_get_next_image_id(void)
45{
46 unsigned int *reset_flags_ptr = (unsigned int *)SSC_GPRETN;
47 unsigned int *nv_flags_ptr = (unsigned int *)
48 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS);
49 /*
50 * Check if TOC is invalid or watchdog reset happened.
51 */
52 if ((arm_io_is_toc_valid() != 1) ||
53 ((*reset_flags_ptr & RESET_REASON_WDOG_RESET) &&
54 ((*nv_flags_ptr == -EAUTH) || (*nv_flags_ptr == -ENOENT))))
55 return NS_BL1U_IMAGE_ID;
56
57 return BL2_IMAGE_ID;
58}
59
60/*******************************************************************************
61 * On JUNO update the arg2 with address of SCP_BL2U image info.
62 ******************************************************************************/
63void bl1_plat_set_ep_info(unsigned int image_id,
64 entry_point_info_t *ep_info)
65{
66 if (image_id == BL2U_IMAGE_ID) {
67 image_desc_t *image_desc = bl1_plat_get_image_desc(SCP_BL2U_IMAGE_ID);
68 ep_info->args.arg2 = (unsigned long)&image_desc->image_info;
69 }
70}
71
72/*******************************************************************************
73 * On Juno clear SYS_NVFLAGS and wait for watchdog reset.
74 ******************************************************************************/
Dan Handley89f8f332015-12-15 14:28:24 +000075__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010076{
77 unsigned int *nv_flags_clr = (unsigned int *)
78 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR);
79 unsigned int *nv_flags_ptr = (unsigned int *)
80 (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS);
81
82 /* Clear the NV flags register. */
83 *nv_flags_clr = *nv_flags_ptr;
84
85 while (1)
86 wfi();
87}