Etienne Carriere | 7ad2c01 | 2019-12-08 08:14:03 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef STM32MP_SHARED_RESOURCES_H |
| 8 | #define STM32MP_SHARED_RESOURCES_H |
| 9 | |
| 10 | #include <stdbool.h> |
Etienne Carriere | 0cfbff9 | 2020-05-13 10:16:21 +0200 | [diff] [blame] | 11 | #include <stdint.h> |
Etienne Carriere | 7ad2c01 | 2019-12-08 08:14:03 +0100 | [diff] [blame] | 12 | |
Etienne Carriere | 1bbb924 | 2020-05-13 14:22:01 +0200 | [diff] [blame] | 13 | #ifdef STM32MP_SHARED_RESOURCES |
| 14 | enum stm32mp_shres; |
| 15 | |
Etienne Carriere | 7ad2c01 | 2019-12-08 08:14:03 +0100 | [diff] [blame] | 16 | /* Return true if @clock_id is shared by secure and non-secure worlds */ |
| 17 | bool stm32mp_nsec_can_access_clock(unsigned long clock_id); |
| 18 | |
| 19 | /* Return true if and only if @reset_id relates to a non-secure peripheral */ |
| 20 | bool stm32mp_nsec_can_access_reset(unsigned int reset_id); |
| 21 | |
Etienne Carriere | 1bbb924 | 2020-05-13 14:22:01 +0200 | [diff] [blame] | 22 | /* Register a shared resource assigned to the secure world */ |
| 23 | void stm32mp_register_secure_periph(enum stm32mp_shres id); |
| 24 | |
| 25 | /* Register a shared resource assigned to the non-secure world */ |
| 26 | void stm32mp_register_non_secure_periph(enum stm32mp_shres id); |
| 27 | |
Etienne Carriere | 0cfbff9 | 2020-05-13 10:16:21 +0200 | [diff] [blame] | 28 | /* Register a peripheral as secure or non-secure based on IO base address */ |
| 29 | void stm32mp_register_secure_periph_iomem(uintptr_t base); |
| 30 | void stm32mp_register_non_secure_periph_iomem(uintptr_t base); |
| 31 | |
Etienne Carriere | 63b2206 | 2020-05-13 10:19:50 +0200 | [diff] [blame] | 32 | /* Register a GPIO as secure or non-secure based on its bank and pin numbers */ |
| 33 | void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin); |
| 34 | void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin); |
| 35 | |
Etienne Carriere | 7a4a34f | 2020-05-13 10:07:45 +0200 | [diff] [blame] | 36 | /* Consolidate peripheral states and lock against new peripheral registering */ |
| 37 | void stm32mp_lock_periph_registering(void); |
Etienne Carriere | 0cfbff9 | 2020-05-13 10:16:21 +0200 | [diff] [blame] | 38 | #else |
| 39 | static inline void stm32mp_register_secure_periph_iomem(uintptr_t base __unused) |
| 40 | { |
| 41 | } |
| 42 | |
| 43 | static inline |
| 44 | void stm32mp_register_non_secure_periph_iomem(uintptr_t base __unused) |
| 45 | { |
| 46 | } |
Etienne Carriere | 63b2206 | 2020-05-13 10:19:50 +0200 | [diff] [blame] | 47 | |
| 48 | static inline void stm32mp_register_secure_gpio(unsigned int bank __unused, |
| 49 | unsigned int pin __unused) |
| 50 | { |
| 51 | } |
| 52 | |
| 53 | static inline void stm32mp_register_non_secure_gpio(unsigned int bank __unused, |
| 54 | unsigned int pin __unused) |
| 55 | { |
| 56 | } |
Etienne Carriere | 1bbb924 | 2020-05-13 14:22:01 +0200 | [diff] [blame] | 57 | #endif /* STM32MP_SHARED_RESOURCES */ |
Etienne Carriere | 7ad2c01 | 2019-12-08 08:14:03 +0100 | [diff] [blame] | 58 | #endif /* STM32MP_SHARED_RESOURCES_H */ |