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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <bl_common.h>
Vikram Kanigirida567432014-04-15 18:08:08 +010035#include <debug.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010036#include <platform.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010037#include <platform_def.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010038#include <stdio.h>
Dan Handleybcd60ba2014-04-17 18:53:42 +010039#include "bl1_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010040
41/*******************************************************************************
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010042 * Runs BL2 from the given entry point. It results in dropping the
43 * exception level
44 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +010045static void __dead2 bl1_run_bl2(entry_point_info_t *bl2_ep)
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010046{
47 bl1_arch_next_el_setup();
48
49 /* Tell next EL what we want done */
50 bl2_ep->args.arg0 = RUN_IMAGE;
51
Vikram Kanigirida567432014-04-15 18:08:08 +010052 if (GET_SECURITY_STATE(bl2_ep->h.attr) == NON_SECURE)
53 change_security_state(GET_SECURITY_STATE(bl2_ep->h.attr));
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010054
55 write_spsr_el3(bl2_ep->spsr);
Vikram Kanigirida567432014-04-15 18:08:08 +010056 write_elr_el3(bl2_ep->pc);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010057
58 eret(bl2_ep->args.arg0,
59 bl2_ep->args.arg1,
60 bl2_ep->args.arg2,
61 bl2_ep->args.arg3,
62 bl2_ep->args.arg4,
63 bl2_ep->args.arg5,
64 bl2_ep->args.arg6,
65 bl2_ep->args.arg7);
66}
67
68
69/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010070 * Function to perform late architectural and platform specific initialization.
71 * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only
72 * called by the primary cpu after a cold boot.
73 * TODO: Add support for alternative image load mechanism e.g using virtio/elf
74 * loader etc.
75 ******************************************************************************/
76void bl1_main(void)
77{
James Morrissey40a6f642014-02-10 14:24:36 +000078#if DEBUG
Vikram Kanigiri78a6e0c2014-03-11 17:41:00 +000079 unsigned long sctlr_el3 = read_sctlr_el3();
James Morrissey40a6f642014-02-10 14:24:36 +000080#endif
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010081 unsigned int load_type = TOP_LOAD;
Vikram Kanigirida567432014-04-15 18:08:08 +010082 image_info_t bl2_image_info = { {0} };
83 entry_point_info_t bl2_ep = { {0} };
Dan Handleye2712bc2014-04-10 15:37:22 +010084 meminfo_t *bl1_tzram_layout;
85 meminfo_t *bl2_tzram_layout = 0x0;
Vikram Kanigirida567432014-04-15 18:08:08 +010086 int err;
Achin Gupta4f6ad662013-10-25 09:08:21 +010087
88 /*
89 * Ensure that MMU/Caches and coherency are turned on
90 */
91 assert(sctlr_el3 | SCTLR_M_BIT);
92 assert(sctlr_el3 | SCTLR_C_BIT);
93 assert(sctlr_el3 | SCTLR_I_BIT);
94
95 /* Perform remaining generic architectural setup from EL3 */
96 bl1_arch_setup();
97
98 /* Perform platform setup in BL1. */
99 bl1_platform_setup();
100
101 /* Announce our arrival */
102 printf(FIRMWARE_WELCOME_STR);
Jon Medhurstecf0a712014-02-17 12:18:24 +0000103 printf("%s\n\r", build_message);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100104
Vikram Kanigirida567432014-04-15 18:08:08 +0100105 SET_PARAM_HEAD(&bl2_image_info, PARAM_IMAGE_BINARY, VERSION_1, 0);
106 SET_PARAM_HEAD(&bl2_ep, PARAM_EP, VERSION_1, 0);
107
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108 /*
109 * Find out how much free trusted ram remains after BL1 load
110 * & load the BL2 image at its top
111 */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +0000112 bl1_tzram_layout = bl1_plat_sec_mem_layout();
Vikram Kanigirida567432014-04-15 18:08:08 +0100113 err = load_image(bl1_tzram_layout,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100114 (const char *) BL2_IMAGE_NAME,
Vikram Kanigirida567432014-04-15 18:08:08 +0100115 load_type,
116 BL2_BASE,
117 &bl2_image_info,
118 &bl2_ep);
119 if (err) {
120 /*
121 * TODO: print failure to load BL2 but also add a tzwdog timer
122 * which will reset the system eventually.
123 */
124 printf("Failed to load boot loader stage 2 (BL2) firmware.\n");
125 panic();
126 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100127 /*
128 * Create a new layout of memory for BL2 as seen by BL1 i.e.
129 * tell it the amount of total and free memory available.
130 * This layout is created at the first free address visible
131 * to BL2. BL2 will read the memory layout before using its
132 * memory for other purposes.
133 */
Dan Handleye2712bc2014-04-10 15:37:22 +0100134 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base;
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +0000135 init_bl2_mem_layout(bl1_tzram_layout,
Achin Gupta4f6ad662013-10-25 09:08:21 +0100136 bl2_tzram_layout,
137 load_type,
Vikram Kanigirida567432014-04-15 18:08:08 +0100138 bl2_image_info.image_base);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100139
Vikram Kanigirida567432014-04-15 18:08:08 +0100140 bl1_plat_set_bl2_ep_info(&bl2_image_info, &bl2_ep);
141 bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout;
142 printf("Booting trusted firmware boot loader stage 2\n");
Achin Gupta4f6ad662013-10-25 09:08:21 +0100143#if DEBUG
Vikram Kanigirida567432014-04-15 18:08:08 +0100144 printf("BL2 address = 0x%llx\n",
145 (unsigned long long) bl2_ep.pc);
146 printf("BL2 cpsr = 0x%x\n", bl2_ep.spsr);
147 printf("BL2 memory layout address = 0x%llx\n",
148 (unsigned long long) bl2_tzram_layout);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100149#endif
Vikram Kanigirida567432014-04-15 18:08:08 +0100150 bl1_run_bl2(&bl2_ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151
Achin Gupta4f6ad662013-10-25 09:08:21 +0100152 return;
153}
154
155/*******************************************************************************
156 * Temporary function to print the fact that BL2 has done its job and BL31 is
157 * about to be loaded. This is needed as long as printfs cannot be used
158 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +0100159void display_boot_progress(entry_point_info_t *bl31_ep_info)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160{
161 printf("Booting trusted firmware boot loader stage 3\n\r");
162#if DEBUG
Vikram Kanigirida567432014-04-15 18:08:08 +0100163 printf("BL31 address = 0x%llx\n", (unsigned long long)bl31_ep_info->pc);
164 printf("BL31 cpsr = 0x%llx\n", (unsigned long long)bl31_ep_info->spsr);
165 printf("BL31 params address = 0x%llx\n",
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100166 (unsigned long long)bl31_ep_info->args.arg0);
Vikram Kanigirida567432014-04-15 18:08:08 +0100167 printf("BL31 plat params address = 0x%llx\n",
168 (unsigned long long)bl31_ep_info->args.arg1);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169#endif
170 return;
171}