Jiafei Pan | 46367ad | 2018-03-02 07:23:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <console.h> |
| 9 | #include <mmio.h> |
| 10 | #include <gicv2.h> |
| 11 | #include "ls_16550.h" |
| 12 | #include "plat_ls.h" |
| 13 | #include "soc.h" |
| 14 | |
| 15 | #define BL31_END (uintptr_t)(&__BL31_END__) |
| 16 | |
| 17 | /* |
| 18 | * Placeholder variables for copying the arguments that have been passed to |
| 19 | * BL31 from BL2. |
| 20 | */ |
| 21 | static entry_point_info_t bl32_image_ep_info; |
| 22 | static entry_point_info_t bl33_image_ep_info; |
| 23 | |
| 24 | const unsigned int g0_interrupt_array1[] = { |
| 25 | 9 |
| 26 | }; |
| 27 | |
| 28 | gicv2_driver_data_t ls_gic_data = { |
| 29 | .gicd_base = GICD_BASE, |
| 30 | .gicc_base = GICC_BASE, |
| 31 | .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array1), |
| 32 | .g0_interrupt_array = g0_interrupt_array1, |
| 33 | }; |
| 34 | |
| 35 | |
| 36 | /******************************************************************************* |
| 37 | * Return a pointer to the 'entry_point_info' structure of the next image for the |
| 38 | * security state specified. BL33 corresponds to the non-secure image type |
| 39 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 40 | * if the image does not exist. |
| 41 | ******************************************************************************/ |
| 42 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 43 | { |
| 44 | entry_point_info_t *next_image_info; |
| 45 | |
| 46 | assert(sec_state_is_valid(type)); |
| 47 | next_image_info = (type == NON_SECURE) |
| 48 | ? &bl33_image_ep_info : &bl32_image_ep_info; |
| 49 | |
| 50 | if (next_image_info->pc) |
| 51 | return next_image_info; |
| 52 | else |
| 53 | return NULL; |
| 54 | } |
| 55 | |
| 56 | /******************************************************************************* |
| 57 | * Perform any BL31 early platform setup common to Layerscape platforms. |
| 58 | * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 |
| 59 | * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be |
| 60 | * done before the MMU is initialized so that the memory layout can be used |
| 61 | * while creating page tables. BL2 has flushed this information to memory, so |
| 62 | * we are guaranteed to pick up good data. |
| 63 | ******************************************************************************/ |
| 64 | void ls_bl31_early_platform_setup(void *from_bl2, |
| 65 | void *plat_params_from_bl2) |
| 66 | { |
| 67 | static console_ls_16550_t console; |
| 68 | |
| 69 | /* Initialize the console to provide early debug support */ |
| 70 | console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK, |
| 71 | LS_TF_UART_BAUDRATE, &console); |
| 72 | #if RESET_TO_BL31 |
| 73 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
| 74 | assert(from_bl2 == NULL); |
| 75 | assert(plat_params_from_bl2 == NULL); |
| 76 | |
| 77 | #ifdef BL32_BASE |
| 78 | /* Populate entry point information for BL32 */ |
| 79 | SET_PARAM_HEAD(&bl32_image_ep_info, |
| 80 | PARAM_EP, |
| 81 | VERSION_1, |
| 82 | 0); |
| 83 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
| 84 | bl32_image_ep_info.pc = BL32_BASE; |
| 85 | bl32_image_ep_info.spsr = ls_get_spsr_for_bl32_entry(); |
| 86 | #endif /* BL32_BASE */ |
| 87 | |
| 88 | /* Populate entry point information for BL33 */ |
| 89 | SET_PARAM_HEAD(&bl33_image_ep_info, |
| 90 | PARAM_EP, |
| 91 | VERSION_1, |
| 92 | 0); |
| 93 | /* |
| 94 | * Tell BL31 where the non-trusted software image |
| 95 | * is located and the entry state information |
| 96 | */ |
| 97 | bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); |
| 98 | |
| 99 | bl33_image_ep_info.spsr = ls_get_spsr_for_bl33_entry(); |
| 100 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 101 | |
| 102 | #else /* RESET_TO_BL31 */ |
| 103 | |
| 104 | /* |
| 105 | * In debug builds, we pass a special value in 'plat_params_from_bl2' |
| 106 | * to verify platform parameters from BL2 to BL31. |
| 107 | * In release builds, it's not used. |
| 108 | */ |
| 109 | assert(((unsigned long long)plat_params_from_bl2) == |
| 110 | LS_BL31_PLAT_PARAM_VAL); |
| 111 | |
| 112 | /* |
| 113 | * Check params passed from BL2 should not be NULL, |
| 114 | */ |
| 115 | bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; |
| 116 | |
| 117 | assert(params_from_bl2 != NULL); |
| 118 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 119 | assert(params_from_bl2->h.version >= VERSION_2); |
| 120 | |
| 121 | bl_params_node_t *bl_params = params_from_bl2->head; |
| 122 | |
| 123 | /* |
| 124 | * Copy BL33 and BL32 (if present), entry point information. |
| 125 | * They are stored in Secure RAM, in BL2's address space. |
| 126 | */ |
| 127 | while (bl_params) { |
| 128 | if (bl_params->image_id == BL32_IMAGE_ID) |
| 129 | bl32_image_ep_info = *bl_params->ep_info; |
| 130 | |
| 131 | if (bl_params->image_id == BL33_IMAGE_ID) |
| 132 | bl33_image_ep_info = *bl_params->ep_info; |
| 133 | |
| 134 | bl_params = bl_params->next_params_info; |
| 135 | } |
| 136 | |
| 137 | if (bl33_image_ep_info.pc == 0) |
| 138 | panic(); |
| 139 | |
| 140 | #endif /* RESET_TO_BL31 */ |
| 141 | } |
| 142 | |
| 143 | /******************************************************************************* |
| 144 | * Perform any BL31 platform setup common to Layerscape platforms |
| 145 | ******************************************************************************/ |
| 146 | void ls_bl31_platform_setup(void) |
| 147 | { |
| 148 | uint32_t gicc_base, gicd_base; |
| 149 | |
| 150 | NOTICE(FIRMWARE_WELCOME_STR_LS1043_BL31); |
| 151 | /* Initialize the GIC driver, cpu and distributor interfaces */ |
| 152 | get_gic_offset(&gicc_base, &gicd_base); |
| 153 | ls_gic_data.gicd_base = (uintptr_t)gicd_base; |
| 154 | ls_gic_data.gicc_base = (uintptr_t)gicc_base; |
| 155 | gicv2_driver_init(&ls_gic_data); |
| 156 | gicv2_distif_init(); |
| 157 | gicv2_pcpu_distif_init(); |
| 158 | gicv2_cpuif_enable(); |
| 159 | |
| 160 | #if RESET_TO_BL31 |
| 161 | /* |
| 162 | * Do initial security configuration to allow DRAM/device access |
| 163 | * (if earlier BL has not already done so). |
| 164 | */ |
| 165 | plat_ls_security_setup(); |
| 166 | |
| 167 | #endif /* RESET_TO_BL31 */ |
| 168 | |
| 169 | /* Enable and initialize the System level generic timer */ |
| 170 | mmio_write_32(LS1043_SYS_CNTCTL_BASE + CNTCR_OFF, |
| 171 | CNTCR_FCREQ(0) | CNTCR_EN); |
| 172 | |
| 173 | VERBOSE("Leave arm_bl31_platform_setup\n"); |
| 174 | } |
| 175 | |
| 176 | /******************************************************************************* |
| 177 | * Perform any BL31 platform runtime setup prior to BL31 exit common to Layerscape |
| 178 | * platforms |
| 179 | ******************************************************************************/ |
| 180 | void ls_bl31_plat_runtime_setup(void) |
| 181 | { |
| 182 | static console_ls_16550_t console; |
| 183 | |
| 184 | /* Initialize the runtime console */ |
| 185 | console_ls_16550_register(PLAT_LS1043_UART_BASE, PLAT_LS1043_UART_CLOCK, |
| 186 | PLAT_LS1043_UART_BAUDRATE, &console); |
| 187 | } |
| 188 | |
| 189 | void bl31_platform_setup(void) |
| 190 | { |
| 191 | ls_bl31_platform_setup(); |
| 192 | } |
| 193 | |
| 194 | void bl31_plat_runtime_setup(void) |
| 195 | { |
| 196 | ls_bl31_plat_runtime_setup(); |
| 197 | } |
| 198 | |
| 199 | /******************************************************************************* |
| 200 | * Perform the very early platform specific architectural setup shared between |
| 201 | * Layerscape platforms. This only does basic initialization. Later |
| 202 | * architectural setup (bl31_arch_setup()) does not do anything platform |
| 203 | * specific. |
| 204 | ******************************************************************************/ |
| 205 | void ls_bl31_plat_arch_setup(void) |
| 206 | { |
| 207 | ls_setup_page_tables(BL31_BASE, |
| 208 | BL31_END - BL31_BASE, |
| 209 | BL_CODE_BASE, |
| 210 | BL_CODE_END, |
| 211 | BL_RO_DATA_BASE, |
| 212 | BL_RO_DATA_END |
| 213 | #if USE_COHERENT_MEM |
| 214 | , BL_COHERENT_RAM_BASE, |
| 215 | BL_COHERENT_RAM_END |
| 216 | #endif |
| 217 | ); |
| 218 | enable_mmu_el3(0); |
| 219 | } |
| 220 | |
| 221 | void bl31_plat_arch_setup(void) |
| 222 | { |
| 223 | ls_bl31_plat_arch_setup(); |
| 224 | } |