Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, Arm Limited and Contributors. All rights reserved. |
| 3 | * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. |
| 4 | * |
| 5 | * SPDX-License-Identifier: BSD-3-Clause |
| 6 | */ |
| 7 | |
| 8 | #include <arch.h> |
| 9 | #include <asm_macros.S> |
| 10 | #include <cpu_macros.S> |
| 11 | |
| 12 | #include <plat_macros.S> |
| 13 | #include <qti_cpu.h> |
| 14 | |
| 15 | .p2align 3 |
| 16 | |
| 17 | /* ------------------------------------------------- |
| 18 | * The CPU Ops reset function for Kryo-3 Silver |
| 19 | * ------------------------------------------------- |
| 20 | */ |
| 21 | func qti_kryo6_silver_reset_func |
| 22 | mov x19, x30 |
| 23 | |
| 24 | bl qtiseclib_kryo6_silver_reset_asm |
Saurabh Gorecha | b849301 | 2022-04-05 00:11:52 +0530 | [diff] [blame^] | 25 | mov x30, x19 |
| 26 | b cortex_a55_reset_func |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 27 | |
| 28 | endfunc qti_kryo6_silver_reset_func |
| 29 | |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 30 | /* --------------------------------------------------------- |
| 31 | * The CPU Ops cluster power down function for Kryo-3 Silver |
| 32 | * --------------------------------------------------------- |
| 33 | */ |
| 34 | func qti_kryo6_silver_cluster_pwr_dwn |
| 35 | ret |
| 36 | endfunc qti_kryo6_silver_cluster_pwr_dwn |
| 37 | |
| 38 | #if REPORT_ERRATA |
| 39 | /* |
| 40 | * Errata printing function for Kryo4 Silver. Must follow AAPCS. |
| 41 | */ |
| 42 | func qti_kryo6_silver_errata_report |
| 43 | /* TODO : Need to add support. Required only for debug bl31 image.*/ |
| 44 | ret |
| 45 | endfunc qti_kryo6_silver_errata_report |
| 46 | #endif |
| 47 | |
| 48 | |
| 49 | /* --------------------------------------------- |
| 50 | * This function provides kryo4_silver specific |
| 51 | * register information for crash reporting. |
| 52 | * It needs to return with x6 pointing to |
| 53 | * a list of register names in ASCII and |
| 54 | * x8 - x15 having values of registers to be |
| 55 | * reported. |
| 56 | * --------------------------------------------- |
| 57 | */ |
| 58 | .section .rodata.qti_kryo4_silver_regs, "aS" |
| 59 | qti_kryo6_silver_regs: /* The ASCII list of register names to be reported */ |
| 60 | .asciz "" |
| 61 | |
| 62 | func qti_kryo6_silver_cpu_reg_dump |
| 63 | adr x6, qti_kryo6_silver_regs |
| 64 | ret |
| 65 | endfunc qti_kryo6_silver_cpu_reg_dump |
| 66 | |
| 67 | |
| 68 | declare_cpu_ops qti_kryo6_silver, QTI_KRYO6_SILVER_MIDR, \ |
| 69 | qti_kryo6_silver_reset_func, \ |
Saurabh Gorecha | b849301 | 2022-04-05 00:11:52 +0530 | [diff] [blame^] | 70 | cortex_a55_core_pwr_dwn, \ |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 71 | qti_kryo6_silver_cluster_pwr_dwn |