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Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03001#
Marcin Wojtasa86fe0c2020-06-02 15:12:06 +02002# Copyright (C) 2016 - 2020 Marvell International Ltd.
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03003#
4# SPDX-License-Identifier: BSD-3-Clause
5# https://spdx.org/licenses
6
Konstantin Porotchkin6ff50d52018-10-07 17:54:20 +03007include tools/marvell/doimage/doimage.mk
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03008
9PLAT_FAMILY := a8k
10PLAT_FAMILY_BASE := plat/marvell/$(PLAT_FAMILY)
11PLAT_INCLUDE_BASE := include/plat/marvell/$(PLAT_FAMILY)
12PLAT_COMMON_BASE := $(PLAT_FAMILY_BASE)/common
13MARVELL_DRV_BASE := drivers/marvell
14MARVELL_COMMON_BASE := plat/marvell/common
15
Konstantin Porotchkinf51f2512018-11-06 12:25:38 +020016MARVELL_SVC_TEST := 0
17$(eval $(call add_define,MARVELL_SVC_TEST))
18
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030019ERRATA_A72_859971 := 1
20
21# Enable MSS support for a8k family
22MSS_SUPPORT := 1
23
24# Disable EL3 cache for power management
Marcin Wojtasa86fe0c2020-06-02 15:12:06 +020025BL31_CACHE_DISABLE := 0
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030026$(eval $(call add_define,BL31_CACHE_DISABLE))
27
28$(eval $(call add_define,PCI_EP_SUPPORT))
29$(eval $(call assert_boolean,PCI_EP_SUPPORT))
30
Grzegorz Jaszczyk2ed16f52018-06-29 18:00:33 +020031AP_NUM := 1
32$(eval $(call add_define,AP_NUM))
33
Konstantin Porotchkin6ff50d52018-10-07 17:54:20 +030034DOIMAGEPATH ?= tools/marvell/doimage
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030035DOIMAGETOOL ?= ${DOIMAGEPATH}/doimage
36
37ROM_BIN_EXT ?= $(BUILD_PLAT)/ble.bin
38DOIMAGE_FLAGS += -b $(ROM_BIN_EXT) $(NAND_DOIMAGE_FLAGS) $(DOIMAGE_SEC_FLAGS)
39
Luka Kovacic49358fb2020-01-13 20:37:35 +010040# Check whether to build system_power.c for the platform
41ifneq ("$(wildcard $(PLAT_FAMILY_BASE)/$(PLAT)/board/system_power.c)","")
42SYSTEM_POWER_SUPPORT = 1
43else
44SYSTEM_POWER_SUPPORT = 0
45endif
46
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030047# This define specifies DDR type for BLE
48$(eval $(call add_define,CONFIG_DDR4))
49
50MARVELL_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
51 drivers/arm/gic/v2/gicv2_main.c \
52 drivers/arm/gic/v2/gicv2_helpers.c \
53 plat/common/plat_gicv2.c
54
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030055PLAT_INCLUDES := -I$(PLAT_FAMILY_BASE)/$(PLAT) \
56 -I$(PLAT_COMMON_BASE)/include \
Antonio Nino Diaz50a4d1a2019-02-01 12:22:22 +000057 -I$(PLAT_INCLUDE_BASE)/common
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030058
59PLAT_BL_COMMON_SOURCES := $(PLAT_COMMON_BASE)/aarch64/a8k_common.c \
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030060 drivers/ti/uart/aarch64/16550_console.S
61
62BLE_PORTING_SOURCES := $(PLAT_FAMILY_BASE)/$(PLAT)/board/dram_port.c \
63 $(PLAT_FAMILY_BASE)/$(PLAT)/board/marvell_plat_config.c
64
65MARVELL_MOCHI_DRV += $(MARVELL_DRV_BASE)/mochi/cp110_setup.c
66
Christine Gharzuzi9a772df2018-06-25 13:39:37 +030067BLE_SOURCES := drivers/mentor/i2c/mi2cv.c \
68 $(PLAT_COMMON_BASE)/plat_ble_setup.c \
69 $(MARVELL_MOCHI_DRV) \
70 $(PLAT_COMMON_BASE)/plat_pm.c \
71 $(MARVELL_DRV_BASE)/ap807_clocks_init.c \
72 $(MARVELL_DRV_BASE)/thermal.c \
73 $(PLAT_COMMON_BASE)/plat_thermal.c \
74 $(BLE_PORTING_SOURCES) \
75 $(MARVELL_DRV_BASE)/ccu.c \
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030076 $(MARVELL_DRV_BASE)/io_win.c
77
78BL1_SOURCES += $(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
79 lib/cpus/aarch64/cortex_a72.S
80
81MARVELL_DRV := $(MARVELL_DRV_BASE)/io_win.c \
82 $(MARVELL_DRV_BASE)/iob.c \
83 $(MARVELL_DRV_BASE)/mci.c \
84 $(MARVELL_DRV_BASE)/amb_adec.c \
85 $(MARVELL_DRV_BASE)/ccu.c \
86 $(MARVELL_DRV_BASE)/cache_llc.c \
Grzegorz Jaszczykf47d8552018-06-13 16:00:48 +020087 $(MARVELL_DRV_BASE)/comphy/phy-comphy-cp110.c \
88 $(MARVELL_DRV_BASE)/mc_trustzone/mc_trustzone.c
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030089
90BL31_PORTING_SOURCES := $(PLAT_FAMILY_BASE)/$(PLAT)/board/marvell_plat_config.c
91
Luka Kovacic49358fb2020-01-13 20:37:35 +010092ifeq ($(SYSTEM_POWER_SUPPORT),1)
93BL31_PORTING_SOURCES += $(PLAT_FAMILY_BASE)/$(PLAT)/board/system_power.c
94endif
95
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030096BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
97 $(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
98 $(PLAT_COMMON_BASE)/aarch64/plat_arch_config.c \
99 $(PLAT_COMMON_BASE)/plat_pm.c \
100 $(PLAT_COMMON_BASE)/plat_bl31_setup.c \
101 $(MARVELL_COMMON_BASE)/marvell_gicv2.c \
102 $(MARVELL_COMMON_BASE)/mrvl_sip_svc.c \
103 $(MARVELL_COMMON_BASE)/marvell_ddr_info.c \
104 $(BL31_PORTING_SOURCES) \
105 $(MARVELL_DRV) \
106 $(MARVELL_MOCHI_DRV) \
107 $(MARVELL_GIC_SOURCES)
108
109# Add trace functionality for PM
110BL31_SOURCES += $(PLAT_COMMON_BASE)/plat_pm_trace.c
111
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +0300112# Force builds with BL2 image on a80x0 platforms
113ifndef SCP_BL2
114 $(error "Error: SCP_BL2 image is mandatory for a8k family")
115endif
116
117# MSS (SCP) build
118include $(PLAT_COMMON_BASE)/mss/mss_a8k.mk
119
120# BLE (ROM context execution code, AKA binary extension)
Konstantin Porotchkin01851db2018-10-03 14:21:42 +0300121BLE_PATH ?= $(PLAT_COMMON_BASE)/ble
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +0300122
123include ${BLE_PATH}/ble.mk
124$(eval $(call MAKE_BL,e))
125
126mrvl_flash: ${BUILD_PLAT}/${FIP_NAME} ${DOIMAGETOOL} ${BUILD_PLAT}/ble.bin
127 $(shell truncate -s %128K ${BUILD_PLAT}/bl1.bin)
128 $(shell cat ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/${FIP_NAME} > ${BUILD_PLAT}/${BOOT_IMAGE})
129 ${DOIMAGETOOL} ${DOIMAGE_FLAGS} ${BUILD_PLAT}/${BOOT_IMAGE} ${BUILD_PLAT}/${FLASH_IMAGE}
130