blob: eccfd976f234628114683f0aa2af92bddb12e79a [file] [log] [blame]
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +00001/*
Alexei Fedorov06d29cf2020-07-29 15:16:36 +01002 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
Varun Wadekar75594062020-07-05 13:12:28 -07003 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +00004 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/*
Andre Przywarae1cc1302020-03-25 15:50:38 +00009 * Driver for GIC-500 and GIC-600 specific features. This driver only
10 * overrides APIs that are different to those generic ones in GICv3
11 * driver.
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000012 *
Alexei Fedorov88fba672019-07-31 13:24:22 +010013 * GIC-600 supports independently power-gating redistributor interface.
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000014 */
15
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000016#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017
18#include <arch_helpers.h>
19#include <drivers/arm/gicv3.h>
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000020
21#include "gicv3_private.h"
22
Alexei Fedorov88fba672019-07-31 13:24:22 +010023/* GIC-600 specific register offsets */
Alexei Fedorov06d29cf2020-07-29 15:16:36 +010024#define GICR_PWRR 0x24U
25#define IIDR_MODEL_ARM_GIC_600 U(0x0200043b)
26#define IIDR_MODEL_ARM_GIC_600AE U(0x0300043b)
Andre Przywarab6c24ce2021-07-20 19:20:07 +010027#define IIDR_MODEL_ARM_GIC_700 U(0x0400043b)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000028
29/* GICR_PWRR fields */
Varun Wadekar75594062020-07-05 13:12:28 -070030#define PWRR_RDPD_SHIFT 0
31#define PWRR_RDAG_SHIFT 1
32#define PWRR_RDGPD_SHIFT 2
33#define PWRR_RDGPO_SHIFT 3
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000034
Alexei Fedorov06d29cf2020-07-29 15:16:36 +010035#define PWRR_RDPD (1U << PWRR_RDPD_SHIFT)
36#define PWRR_RDAG (1U << PWRR_RDAG_SHIFT)
37#define PWRR_RDGPD (1U << PWRR_RDGPD_SHIFT)
38#define PWRR_RDGPO (1U << PWRR_RDGPO_SHIFT)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000039
Alexei Fedorov88fba672019-07-31 13:24:22 +010040/*
41 * Values to write to GICR_PWRR register to power redistributor
42 * for operating through the core (GICR_PWRR.RDAG = 0)
43 */
Alexei Fedorov06d29cf2020-07-29 15:16:36 +010044#define PWRR_ON (0U << PWRR_RDPD_SHIFT)
45#define PWRR_OFF (1U << PWRR_RDPD_SHIFT)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000046
Andre Przywarae1cc1302020-03-25 15:50:38 +000047#if GICV3_SUPPORT_GIC600
48
Andre Przywarab6c24ce2021-07-20 19:20:07 +010049/* GIC-600/700 specific accessor functions */
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000050static void gicr_write_pwrr(uintptr_t base, unsigned int val)
51{
Douglas Raillard1bd2d742017-08-03 15:59:49 +010052 mmio_write_32(base + GICR_PWRR, val);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000053}
54
55static uint32_t gicr_read_pwrr(uintptr_t base)
56{
Douglas Raillard1bd2d742017-08-03 15:59:49 +010057 return mmio_read_32(base + GICR_PWRR);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000058}
59
Alexei Fedorov88fba672019-07-31 13:24:22 +010060static void gicr_wait_group_not_in_transit(uintptr_t base)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000061{
Alexei Fedorov06d29cf2020-07-29 15:16:36 +010062 uint32_t pwrr;
63
64 do {
65 pwrr = gicr_read_pwrr(base);
66
Alexei Fedorov88fba672019-07-31 13:24:22 +010067 /* Check group not transitioning: RDGPD == RDGPO */
Alexei Fedorov06d29cf2020-07-29 15:16:36 +010068 } while (((pwrr & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) !=
69 ((pwrr & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT));
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000070}
71
72static void gic600_pwr_on(uintptr_t base)
73{
Alexei Fedorov88fba672019-07-31 13:24:22 +010074 do { /* Wait until group not transitioning */
75 gicr_wait_group_not_in_transit(base);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000076
Alexei Fedorov88fba672019-07-31 13:24:22 +010077 /* Power on redistributor */
78 gicr_write_pwrr(base, PWRR_ON);
79
80 /*
81 * Wait until the power on state is reflected.
82 * If RDPD == 0 then powered on.
83 */
84 } while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000085}
86
87static void gic600_pwr_off(uintptr_t base)
88{
Alexei Fedorov88fba672019-07-31 13:24:22 +010089 /* Wait until group not transitioning */
90 gicr_wait_group_not_in_transit(base);
91
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000092 /* Power off redistributor */
93 gicr_write_pwrr(base, PWRR_OFF);
94
95 /*
96 * If this is the last man, turning this redistributor frame off will
Alexei Fedorov88fba672019-07-31 13:24:22 +010097 * result in the group itself being powered off and RDGPD = 1.
98 * In that case, wait as long as it's in transition, or has aborted
99 * the transition altogether for any reason.
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000100 */
Alexei Fedorov06d29cf2020-07-29 15:16:36 +0100101 if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0U) {
Alexei Fedorov88fba672019-07-31 13:24:22 +0100102 /* Wait until group not transitioning */
103 gicr_wait_group_not_in_transit(base);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000104 }
105}
106
Andre Przywarae1cc1302020-03-25 15:50:38 +0000107static uintptr_t get_gicr_base(unsigned int proc_num)
108{
109 uintptr_t gicr_base;
110
Alexei Fedorov06d29cf2020-07-29 15:16:36 +0100111 assert(gicv3_driver_data != NULL);
Andre Przywarae1cc1302020-03-25 15:50:38 +0000112 assert(proc_num < gicv3_driver_data->rdistif_num);
Alexei Fedorov06d29cf2020-07-29 15:16:36 +0100113 assert(gicv3_driver_data->rdistif_base_addrs != NULL);
Andre Przywarae1cc1302020-03-25 15:50:38 +0000114
115 gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
Alexei Fedorov06d29cf2020-07-29 15:16:36 +0100116 assert(gicr_base != 0UL);
Andre Przywarae1cc1302020-03-25 15:50:38 +0000117
118 return gicr_base;
119}
120
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100121static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base)
Andre Przywarae1cc1302020-03-25 15:50:38 +0000122{
123 uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR);
124
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100125 /*
Andre Przywarab6c24ce2021-07-20 19:20:07 +0100126 * The Arm GIC-600 and GIC-700 models have their redistributors
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100127 * powered down at reset.
128 */
Varun Wadekar75594062020-07-05 13:12:28 -0700129 return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) ||
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100130 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) ||
Andre Przywarab6c24ce2021-07-20 19:20:07 +0100131 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_700));
Andre Przywarae1cc1302020-03-25 15:50:38 +0000132}
133
Alexei Fedorov06d29cf2020-07-29 15:16:36 +0100134#endif /* GICV3_SUPPORT_GIC600 */
Andre Przywarae1cc1302020-03-25 15:50:38 +0000135
Soby Mathew327548c2017-07-13 15:19:51 +0100136void gicv3_distif_pre_save(unsigned int proc_num)
137{
138 arm_gicv3_distif_pre_save(proc_num);
139}
140
141void gicv3_distif_post_restore(unsigned int proc_num)
142{
143 arm_gicv3_distif_post_restore(proc_num);
144}
145
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000146/*
Andre Przywarae1cc1302020-03-25 15:50:38 +0000147 * Power off GIC-600 redistributor (if configured and detected)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000148 */
149void gicv3_rdistif_off(unsigned int proc_num)
150{
Andre Przywarae1cc1302020-03-25 15:50:38 +0000151#if GICV3_SUPPORT_GIC600
152 uintptr_t gicr_base = get_gicr_base(proc_num);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000153
154 /* Attempt to power redistributor off */
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100155 if (gicv3_redists_need_power_mgmt(gicr_base)) {
Andre Przywarae1cc1302020-03-25 15:50:38 +0000156 gic600_pwr_off(gicr_base);
157 }
158#endif
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000159}
160
161/*
Andre Przywarae1cc1302020-03-25 15:50:38 +0000162 * Power on GIC-600 redistributor (if configured and detected)
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000163 */
164void gicv3_rdistif_on(unsigned int proc_num)
165{
Andre Przywarae1cc1302020-03-25 15:50:38 +0000166#if GICV3_SUPPORT_GIC600
167 uintptr_t gicr_base = get_gicr_base(proc_num);
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000168
169 /* Power redistributor on */
Andre Przywara19b2d4e2020-06-26 10:30:33 +0100170 if (gicv3_redists_need_power_mgmt(gicr_base)) {
Andre Przywarae1cc1302020-03-25 15:50:38 +0000171 gic600_pwr_on(gicr_base);
172 }
173#endif
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000174}