blob: 9dae8cd672dcc481714af3e39933008c81017347 [file] [log] [blame]
Varun Wadekar921b9062015-08-25 17:03:14 +05301#
Pritesh Raithatha9eb5db52017-01-02 19:42:31 +05302# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekar921b9062015-08-25 17:03:14 +05303#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Varun Wadekar921b9062015-08-25 17:03:14 +05305#
6
7# platform configs
Varun Wadekar4c7fa502016-12-13 13:13:42 -08008ENABLE_AFI_DEVICE := 1
9$(eval $(call add_define,ENABLE_AFI_DEVICE))
10
Varun Wadekara0f26972016-03-11 17:18:51 -080011ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1
12$(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
13
Varun Wadekar94701ff2016-05-23 11:47:34 -070014RELOCATE_TO_BL31_BASE := 1
15$(eval $(call add_define,RELOCATE_TO_BL31_BASE))
16
Varun Wadekarad2824f2016-03-28 13:44:35 -070017ENABLE_CHIP_VERIFICATION_HARNESS := 0
18$(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
19
Varun Wadekar6cb25f92016-12-19 11:17:54 -080020ENABLE_SMMU_DEVICE := 1
21$(eval $(call add_define,ENABLE_SMMU_DEVICE))
22
Varun Wadekar94701ff2016-05-23 11:47:34 -070023RESET_TO_BL31 := 1
24
25PROGRAMMABLE_RESET_ADDRESS := 1
26
27COLD_BOOT_SINGLE_CPU := 1
28
Varun Wadekar921b9062015-08-25 17:03:14 +053029# platform settings
Varun Wadekar94d85322015-11-30 12:05:04 -080030TZDRAM_BASE := 0x30000000
Varun Wadekar921b9062015-08-25 17:03:14 +053031$(eval $(call add_define,TZDRAM_BASE))
32
33PLATFORM_CLUSTER_COUNT := 2
34$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
35
36PLATFORM_MAX_CPUS_PER_CLUSTER := 4
37$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
38
Varun Wadekard64db962016-09-23 14:28:16 -070039MAX_XLAT_TABLES := 24
Varun Wadekar921b9062015-08-25 17:03:14 +053040$(eval $(call add_define,MAX_XLAT_TABLES))
41
Varun Wadekard64db962016-09-23 14:28:16 -070042MAX_MMAP_REGIONS := 24
Varun Wadekar921b9062015-08-25 17:03:14 +053043$(eval $(call add_define,MAX_MMAP_REGIONS))
44
45# platform files
46PLAT_INCLUDES += -I${SOC_DIR}/drivers/include
47
48BL31_SOURCES += lib/cpus/aarch64/denver.S \
49 lib/cpus/aarch64/cortex_a57.S \
Varun Wadekaree25e822017-06-28 14:38:19 -070050 ${COMMON_DIR}/drivers/gpcdma/gpcdma.c \
Pritesh Raithathac88654f2017-01-02 20:11:32 +053051 ${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \
Varun Wadekarbd2b4142016-12-12 16:46:44 -080052 ${COMMON_DIR}/drivers/smmu/smmu.c \
Varun Wadekara0352ab2017-03-14 14:24:35 -070053 ${SOC_DIR}/drivers/mce/mce.c \
54 ${SOC_DIR}/drivers/mce/ari.c \
55 ${SOC_DIR}/drivers/mce/nvg.c \
56 ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
Pritesh Raithatha9eb5db52017-01-02 19:42:31 +053057 ${SOC_DIR}/plat_memctrl.c \
Varun Wadekar921b9062015-08-25 17:03:14 +053058 ${SOC_DIR}/plat_psci_handlers.c \
59 ${SOC_DIR}/plat_setup.c \
60 ${SOC_DIR}/plat_secondary.c \
Varun Wadekar93bed2a2016-03-18 13:07:33 -070061 ${SOC_DIR}/plat_sip_calls.c \
Pritesh Raithathac88654f2017-01-02 20:11:32 +053062 ${SOC_DIR}/plat_smmu.c \
Varun Wadekar93bed2a2016-03-18 13:07:33 -070063 ${SOC_DIR}/plat_trampoline.S
Pritesh Raithatha9eb5db52017-01-02 19:42:31 +053064
Varun Wadekarb01d3bb2017-07-25 13:29:52 -070065# Enable workarounds for selected Cortex-A57 erratas.
66A57_DISABLE_NON_TEMPORAL_HINT := 1
67ERRATA_A57_806969 := 1
68ERRATA_A57_813419 := 1
69ERRATA_A57_813420 := 1
70ERRATA_A57_826974 := 1
71ERRATA_A57_826977 := 1
72ERRATA_A57_828024 := 1
73ERRATA_A57_829520 := 1
74ERRATA_A57_833471 := 1