| Sheetal Tigadoli | b015670 | 2020-01-05 14:59:04 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 - 2020, Broadcom |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef CSL_SD_H |
| 8 | #define CSL_SD_H |
| 9 | |
| 10 | #define SD_CLOCK_BASE 104000000 |
| 11 | #define SD_CLOCK_52MHZ 52000000 |
| 12 | #define SD_CLOCK_26MHZ 26000000 |
| 13 | #define SD_CLOCK_17MHZ 17330000 |
| 14 | #define SD_CLOCK_13MHZ 13000000 |
| 15 | #define SD_CLOCK_10MHZ 10000000 |
| 16 | #define SD_CLOCK_9MHZ 9000000 |
| 17 | #define SD_CLOCK_7MHZ 7000000 |
| 18 | #define SD_CLOCK_5MHZ 5000000 |
| 19 | #define SD_CLOCK_1MHZ 1000000 |
| 20 | #define SD_CLOCK_400KHZ 400000 |
| 21 | |
| 22 | #define SD_DRIVE_STRENGTH_MASK 0x38000000 |
| 23 | #if defined(_BCM213x1_) || defined(_BCM21551_) || defined(_ATHENA_) |
| 24 | #define SD_DRIVE_STRENGTH 0x28000000 |
| 25 | #elif defined(_BCM2153_) |
| 26 | #define SD_DRIVE_STRENGTH 0x38000000 |
| 27 | #else |
| 28 | #define SD_DRIVE_STRENGTH 0x00000000 |
| 29 | #endif |
| 30 | |
| 31 | #define SD_NUM_HOST 2 |
| 32 | |
| 33 | #define SD_CARD_UNLOCK 0 |
| 34 | #define SD_CARD_LOCK 0x4 |
| 35 | #define SD_CARD_CLEAR_PWD 0x2 |
| 36 | #define SD_CARD_SET_PWD 0x1 |
| 37 | #define SD_CARD_ERASE_PWD 0x8 |
| 38 | |
| 39 | #define SD_CARD_LOCK_STATUS 0x02000000 |
| 40 | #define SD_CARD_UNLOCK_STATUS 0x01000000 |
| 41 | |
| 42 | #define SD_CMD_ERROR_FLAGS (0x18F << 16) |
| 43 | #define SD_DATA_ERROR_FLAGS (0x70 << 16) |
| 44 | #define SD_AUTO_CMD12_ERROR_FLAGS (0x9F) |
| 45 | #define SD_CARD_STATUS_ERROR 0x10000000 |
| 46 | #define SD_CMD_MISSING 0x80000000 |
| 47 | |
| 48 | #define SD_TRAN_HIGH_SPEED 0x32 |
| 49 | #define SD_CARD_HIGH_CAPACITY 0x40000000 |
| 50 | #define SD_CARD_POWER_UP_STATUS 0x80000000 |
| 51 | |
| 52 | struct sd_dev_info { |
| 53 | uint32_t mode; /* interrupt or polling */ |
| 54 | uint32_t dma; /* dma enabled or disabled */ |
| 55 | uint32_t voltage; /* voltage level */ |
| 56 | uint32_t slot; /* if the HC is locatd at slot 0 or slot 1 */ |
| 57 | uint32_t version; /* 1.0 or 2.0 */ |
| 58 | uint32_t curSystemAddr; /* system address */ |
| 59 | uint32_t dataWidth; /* data width for the controller */ |
| 60 | uint32_t clock; /* clock rate */ |
| 61 | uint32_t status; /* if device is active on transfer or not */ |
| 62 | }; |
| 63 | |
| 64 | void data_xfer_setup(struct sd_handle *handle, uint8_t *data, |
| 65 | uint32_t length, int dir); |
| 66 | int reset_card(struct sd_handle *handle); |
| 67 | int reset_host_ctrl(struct sd_handle *handle); |
| 68 | int init_card(struct sd_handle *handle, int detection); |
| 69 | int init_mmc_card(struct sd_handle *handle); |
| 70 | int write_buffer(struct sd_handle *handle, uint32_t len, uint8_t *buffer); |
| 71 | int read_buffer(struct sd_handle *handle, uint32_t len, uint8_t *buffer); |
| 72 | int select_blk_sz(struct sd_handle *handle, uint16_t size); |
| 73 | int check_error(struct sd_handle *handle, uint32_t ints); |
| 74 | |
| 75 | int process_data_xfer(struct sd_handle *handle, uint8_t *buffer, |
| 76 | uint32_t addr, uint32_t length, int dir); |
| 77 | int read_block(struct sd_handle *handle, uint8_t *dst, uint32_t addr, |
| 78 | uint32_t len); |
| 79 | #ifdef INCLUDE_EMMC_DRIVER_ERASE_CODE |
| 80 | int erase_card(struct sd_handle *handle, uint32_t addr, uint32_t blocks); |
| 81 | #endif |
| 82 | int write_block(struct sd_handle *handle, uint8_t *src, uint32_t addr, |
| 83 | uint32_t len); |
| 84 | int process_cmd_response(struct sd_handle *handle, uint32_t cmdIndex, |
| 85 | uint32_t rsp0, uint32_t rsp1, uint32_t rsp2, |
| 86 | uint32_t rsp3, struct sd_resp *resp); |
| 87 | int32_t set_config(struct sd_handle *handle, uint32_t speed, |
| 88 | uint32_t retry, uint32_t dma, uint32_t dmaBound, |
| 89 | uint32_t blkSize, uint32_t wfe_retry); |
| 90 | |
| 91 | uint32_t wait_for_event(struct sd_handle *handle, uint32_t mask, |
| 92 | uint32_t retry); |
| 93 | int set_boot_config(struct sd_handle *handle, uint32_t config); |
| 94 | |
| 95 | int mmc_cmd1(struct sd_handle *handle); |
| 96 | #endif /* CSL_SD_H */ |