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Antonio Nino Diaz352c8522017-12-15 11:41:17 +00001*******************************
2Secure Partition Manager Design
3*******************************
4
5.. section-numbering::
6 :suffix: .
7
8.. contents::
9
10Background
11==========
12
13In some market segments that primarily deal with client-side devices like mobile
14phones, tablets, STBs and embedded devices, a Trusted OS instantiates trusted
15applications to provide security services like DRM, secure payment and
16authentication. The Global Platform TEE Client API specification defines the API
17used by Non-secure world applications to access these services. A Trusted OS
18fulfils the requirements of a security service as described above.
19
20Management services are typically implemented at the highest level of privilege
21in the system (i.e. EL3 in Arm Trusted Firmware). The service requirements are
22fulfilled by the execution environment provided by Arm Trusted Firmware.
23
24The following diagram illustrates the corresponding software stack:
25
26|Image 1|
27
28In other market segments that primarily deal with server-side devices (e.g. data
29centres and enterprise servers) the secure software stack typically does not
30include a Global Platform Trusted OS. Security functions are accessed through
31other interfaces (e.g. ACPI TCG TPM interface, UEFI runtime variable service).
32
33Placement of management and security functions with diverse requirements in a
34privileged Exception Level (i.e. EL3 or S-EL1) makes security auditing of
35firmware more difficult and does not allow isolation of unrelated services from
36each other either.
37
38Introduction
39============
40
41A **Secure Partition** is a software execution environment instantiated in
42S-EL0 that can be used to implement simple management and security services.
43Since S-EL0 is an unprivileged Exception Level, a Secure Partition relies on
44privileged firmware (i.e. Arm Trusted Firmware) to be granted access to system
45and processor resources. Essentially, it is a software sandbox in the Secure
46world that runs under the control of privileged software, provides one or more
47services and accesses the following system resources:
48
49- Memory and device regions in the system address map.
50
51- PE system registers.
52
53- A range of synchronous exceptions (e.g. SMC function identifiers).
54
55Note that currently the Arm Trusted Firmware only supports handling one Secure
56Partition.
57
58A Secure Partition enables Arm Trusted Firmware to implement only the essential
59secure services in EL3 and instantiate the rest in a partition in S-EL0.
60Furthermore, multiple Secure Partitions can be used to isolate unrelated
61services from each other.
62
63The following diagram illustrates the place of a Secure Partition in a typical
64ARMv8-A software stack. A single or multiple Secure Partitions provide secure
65services to software components in the Non-secure world and other Secure
66Partitions.
67
68|Image 2|
69
70The Arm Trusted Firmware build system is responsible for including the Secure
71Partition image in the FIP. During boot, BL2 includes support to authenticate
72and load the Secure Partition image. A BL31 component called **Secure Partition
73Manager (SPM)** is responsible for managing the partition. This is semantically
74similar to a hypervisor managing a virtual machine.
75
76The SPM is responsible for the following actions during boot:
77
78- Allocate resources requested by the Secure Partition.
79
80- Perform architectural and system setup required by the Secure Partition to
81 fulfil a service request.
82
83- Implement a standard interface that is used for initialising a Secure
84 Partition.
85
86The SPM is responsible for the following actions during runtime:
87
88- Implement a standard interface that is used by a Secure Partition to fulfil
89 service requests.
90
91- Implement a standard interface that is used by the Non-secure world for
92 accessing the services exported by a Secure Partition. A service can be
93 invoked through a SMC.
94
95Alternatively, a partition can be viewed as a thread of execution running under
96the control of the SPM. Hence common programming concepts described below are
97applicable to a partition.
98
99Description
100===========
101
102The previous section introduced some general aspects of the software
103architecture of a Secure Partition. This section describes the specific choices
104made in the current implementation of this software architecture. Subsequent
105revisions of the implementation will include a richer set of features that
106enable a more flexible architecture.
107
108Building Arm Trusted Firmware with Secure Partition support
109-----------------------------------------------------------
110
111SPM is supported on the Arm FVP exclusively at the moment. The current
112implementation supports inclusion of only a single Secure Partition in which a
113service always runs to completion (e.g. the requested services cannot be
114preempted to give control back to the Normal world).
115
116It is not currently possible for BL31 to integrate SPM support and a Secure
117Payload Dispatcher (SPD) at the same time; they are mutually exclusive. In the
118SPM bootflow, a Secure Partition image executing at S-EL0 replaces the Secure
119Payload image executing at S-EL1 (e.g. a Trusted OS). Both are referred to as
120BL32.
121
122A working prototype of a SP has been implemented by re-purposing the EDK2 code
123and tools, leveraging the concept of the *Standalone Management Mode (MM)* in
124the UEFI specification (see the PI v1.6 Volume 4: Management Mode Core
125Interface). This will be referred to as the *Standalone MM Secure Partition* in
126the rest of this document.
127
128To enable SPM support in the TF, the source code must be compiled with the build
129flag ``ENABLE_SPM=1``. On Arm platforms the build option ``ARM_BL31_IN_DRAM``
130can be used to select the location of BL31, both SRAM and DRAM are supported.
131Also, the location of the binary that contains the BL32 image
132(``BL32=path/to/image.bin``) must be specified.
133
134First, build the Standalone MM Secure Partition. To build it, refer to the
135`instructions in the EDK2 repository`_.
136
137Then build TF with SPM support and include the Standalone MM Secure Partition
138image in the FIP:
139
140::
141
142 BL32=path/to/standalone/mm/sp BL33=path/to/bl33.bin \
143 make PLAT=fvp ENABLE_SPM=1 fip all
144
145Describing Secure Partition resources
146-------------------------------------
147
148Arm Trusted Firmware exports a porting interface that enables a platform to
149specify the system resources required by the Secure Partition. Some instructions
150are given below. However, this interface is under development and it may change
151as new features are implemented.
152
153- A Secure Partition is considered a BL32 image, so the same defines that apply
154 to BL32 images apply to a Secure Partition: ``BL32_BASE`` and ``BL32_LIMIT``.
155
156- The following defines are needed to allocate space for the translation tables
157 used by the Secure Partition: ``PLAT_SP_IMAGE_MMAP_REGIONS`` and
158 ``PLAT_SP_IMAGE_MAX_XLAT_TABLES``.
159
160- The functions ``plat_get_secure_partition_mmap()`` and
161 ``plat_get_secure_partition_boot_info()`` have to be implemented. The file
162 ``plat/arm/board/fvp/fvp_common.c`` can be used as an example. It uses the
163 defines in ``include/plat/arm/common/arm_spm_def.h``.
164
165 - ``plat_get_secure_partition_mmap()`` returns an array of mmap regions that
166 describe the memory regions that the SPM needs to allocate for a Secure
167 Partition.
168
169 - ``plat_get_secure_partition_boot_info()`` returns a
170 ``secure_partition_boot_info_t`` struct that is populated by the platform
171 with information about the memory map of the Secure Partition.
172
173For an example of all the changes in context, you may refer to commit
174``e29efeb1b4``, in which the port for FVP was introduced.
175
176Accessing Secure Partition services
177-----------------------------------
178
179The `SMC Calling Convention`_ (*ARM DEN 0028B*) describes SMCs as a conduit for
180accessing services implemented in the Secure world. The ``MM_COMMUNICATE``
181interface defined in the `Management Mode Interface Specification`_ (*ARM DEN
1820060A*) is used to invoke a Secure Partition service as a Fast Call.
183
184The mechanism used to identify a service within the partition depends on the
185service implementation. It is assumed that the caller of the service will be
186able to discover this mechanism through standard platform discovery mechanisms
187like ACPI and Device Trees. For example, *Volume 4: Platform Initialisation
188Specification v1.6. Management Mode Core Interface* specifies that a GUID is
189used to identify a management mode service. A client populates the GUID in the
190``EFI_MM_COMMUNICATE_HEADER``. The header is populated in the communication
191buffer shared with the Secure Partition.
192
193A Fast Call appears to be atomic from the perspective of the caller and returns
194when the requested operation has completed. A service invoked through the
195``MM_COMMUNICATE`` SMC will run to completion in the partition on a given CPU.
196The SPM is responsible for guaranteeing this behaviour. This means that there
197can only be a single outstanding Fast Call in a partition on a given CPU.
198
199Exchanging data with the Secure Partition
200-----------------------------------------
201
202The exchange of data between the Non-secure world and the partition takes place
203through a shared memory region. The location of data in the shared memory area
204is passed as a parameter to the ``MM_COMMUNICATE`` SMC. The shared memory area
205is statically allocated by the SPM and is expected to be either implicitly known
206to the Non-secure world or discovered through a platform discovery mechanism
207e.g. ACPI table or device tree. It is possible for the Non-secure world to
208exchange data with a partition only if it has been populated in this shared
209memory area. The shared memory area is implemented as per the guidelines
210specified in Section 3.2.3 of the `Management Mode Interface Specification`_
211(*ARM DEN 0060A*).
212
213The format of data structures used to encapsulate data in the shared memory is
214agreed between the Non-secure world and the Secure Partition. For example, in
215the `Management Mode Interface specification`_ (*ARM DEN 0060A*), Section 4
216describes that the communication buffer shared between the Non-secure world and
217the Management Mode (MM) in the Secure world must be of the type
218``EFI_MM_COMMUNICATE_HEADER``. This data structure is defined in *Volume 4:
219Platform Initialisation Specification v1.6. Management Mode Core Interface*.
220Any caller of a MM service will have to use the ``EFI_MM_COMMUNICATE_HEADER``
221data structure.
222
223Runtime model of the Secure Partition
224=====================================
225
226This section describes how the Secure Partition interfaces with the SPM.
227
228Interface with SPM
229------------------
230
231In order to instantiate one or more secure services in the Secure Partition in
232S-EL0, the SPM should define the following types of interfaces:
233
234- Interfaces that enable access to privileged operations from S-EL0. These
235 operations typically require access to system resources that are either shared
236 amongst multiple software components in the Secure world or cannot be directly
237 accessed from an unprivileged Exception Level.
238
239- Interfaces that establish the control path between the SPM and the Secure
240 Partition.
241
242This section describes the APIs currently exported by the SPM that enable a
243Secure Partition to initialise itself and export its services in S-EL0. These
244interfaces are not accessible from the Non-secure world.
245
246Conduit
247^^^^^^^
248
249The `SMC Calling Convention`_ (*ARM DEN 0028B*) specification describes the SMC
250and HVC conduits for accessing firmware services and their availability
251depending on the implemented Exception levels. In S-EL0, the Supervisor Call
252exception (SVC) is the only architectural mechanism available for unprivileged
253software to make a request for an operation implemented in privileged software.
254Hence, the SVC conduit must be used by the Secure Partition to access interfaces
255implemented by the SPM.
256
257A SVC causes an exception to be taken to S-EL1. Arm Trusted Firmware assumes
258ownership of S-EL1 and installs a simple exception vector table in S-EL1 that
259relays a SVC request from a Secure Partition as a SMC request to the SPM in EL3.
260Upon servicing the SMC request, Arm Trusted Firmware returns control directly to
261S-EL0 through an ERET instruction.
262
263Calling conventions
264^^^^^^^^^^^^^^^^^^^
265
266The `SMC Calling Convention`_ (*ARM DEN 0028B*) specification describes the
26732-bit and 64-bit calling conventions for the SMC and HVC conduits. The SVC
268conduit introduces the concept of SVC32 and SVC64 calling conventions. The SVC32
269and SVC64 calling conventions are equivalent to the 32-bit (SMC32) and the
27064-bit (SMC64) calling conventions respectively.
271
272Communication initiated by SPM
273^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
274
275A service request is initiated from the SPM through an exception return
276instruction (ERET) to S-EL0. Later, the Secure Partition issues an SVC
277instruction to signal completion of the request. Some example use cases are
278given below:
279
280- A request to initialise the Secure Partition during system boot.
281
282- A request to handle a runtime service request.
283
284Communication initiated by Secure Partition
285^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
286
287A request is initiated from the Secure Partition by executing a SVC instruction.
288An ERET instruction is used by Arm Trusted Firmware to return to S-EL0 with the
289result of the request.
290
291For instance, a request to perform privileged operations on behalf of a
292partition (e.g. management of memory attributes in the translation tables for
293the Secure EL1&0 translation regime).
294
295Interfaces
296^^^^^^^^^^
297
298The current implementation reserves function IDs for Fast Calls in the Standard
299Secure Service calls range (see `SMC Calling Convention`_ (*ARM DEN 0028B*)
300specification) for each API exported by the SPM. This section defines the
301function prototypes for each function ID. The function IDs specify whether one
302or both of the SVC32 and SVC64 calling conventions can be used to invoke the
303corresponding interface.
304
305Secure Partition Event Management
306^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
307
308The Secure Partition provides an Event Management interface that is used by the
309SPM to delegate service requests to the Secure Partition. The interface also
310allows the Secure Partition to:
311
312- Register with the SPM a service that it provides.
313- Indicate completion of a service request delagated by the SPM
314
315Miscellaneous interfaces
316------------------------
317
318``SPM_VERSION_AARCH32``
319^^^^^^^^^^^^^^^^^^^^^^^
320
321- Description
322
323 Returns the version of the interface exported by SPM.
324
325- Parameters
326
327 - **uint32** - Function ID
328
329 - SVC32 Version: **0x84000060**
330
331- Return parameters
332
333 - **int32** - Status
334
335 On success, the format of the value is as follows:
336
337 - Bit [31]: Must be 0
338 - Bits [30:16]: Major Version. Must be 0 for this revision of the SPM
339 interface.
340 - Bits [15:0]: Minor Version. Must be 1 for this revision of the SPM
341 interface.
342
343 On error, the format of the value is as follows:
344
345 - ``NOT_SUPPORTED``: SPM interface is not supported or not available for the
346 client.
347
348- Usage
349
350 This function returns the version of the Secure Partition Manager
351 implementation. The major version is 0 and the minor version is 1. The version
352 number is a 31-bit unsigned integer, with the upper 15 bits denoting the major
353 revision, and the lower 16 bits denoting the minor revision. The following
354 rules apply to the version numbering:
355
356 - Different major revision values indicate possibly incompatible functions.
357
358 - For two revisions, A and B, for which the major revision values are
359 identical, if the minor revision value of revision B is greater than the
360 minor revision value of revision A, then every function in revision A must
361 work in a compatible way with revision B. However, it is possible for
362 revision B to have a higher function count than revision A.
363
364- Implementation responsibilities
365
366 If this function returns a valid version number, all the functions that are
367 described subsequently must be implemented, unless it is explicitly stated
368 that a function is optional.
369
370See `Error Codes`_ for integer values that are associated with each return
371code.
372
373Secure Partition Initialisation
374-------------------------------
375
376The SPM is responsible for initialising the architectural execution context to
377enable initialisation of a service in S-EL0. The responsibilities of the SPM are
378listed below. At the end of initialisation, the partition issues a
379``SP_EVENT_COMPLETE_AARCH64`` call (described later) to signal readiness for
380handling requests for services implemented by the Secure Partition. The
381initialisation event is executed as a Fast Call.
382
383Entry point invocation
384^^^^^^^^^^^^^^^^^^^^^^
385
386The entry point for service requests that should be handled as Fast Calls is
387used as the target of the ERET instruction to start initialisation of the Secure
388Partition.
389
390Architectural Setup
391^^^^^^^^^^^^^^^^^^^
392
393At cold boot, system registers accessible from S-EL0 will be in their reset
394state unless otherwise specified. The SPM will perform the following
395architectural setup to enable execution in S-EL0
396
397MMU setup
398^^^^^^^^^
399
400The platform port of a Secure Partition specifies to the SPM a list of regions
401that it needs access to and their attributes. The SPM validates this resource
402description and initialises the Secure EL1&0 translation regime as follows.
403
4041. Device regions are mapped with nGnRE attributes and Execute Never
405 instruction access permissions.
406
4072. Code memory regions are mapped with RO data and Executable instruction access
408 permissions.
409
4103. Read Only data memory regions are mapped with RO data and Execute Never
411 instruction access permissions.
412
4134. Read Write data memory regions are mapped with RW data and Execute Never
414 instruction access permissions.
415
4165. If the resource description does not explicitly describe the type of memory
417 regions then all memory regions will be marked with Code memory region
418 attributes.
419
4206. The ``UXN`` and ``PXN`` bits are set for regions that are not executable by
421 S-EL0 or S-EL1.
422
423System Register Setup
424^^^^^^^^^^^^^^^^^^^^^
425
426System registers that influence software execution in S-EL0 are setup by the SPM
427as follows:
428
4291. ``SCTLR_EL1``
430
431 - ``UCI=1``
432 - ``EOE=0``
433 - ``WXN=1``
434 - ``nTWE=1``
435 - ``nTWI=1``
436 - ``UCT=1``
437 - ``DZE=1``
438 - ``I=1``
439 - ``UMA=0``
440 - ``SA0=1``
441 - ``C=1``
442 - ``A=1``
443 - ``M=1``
444
4452. ``CPACR_EL1``
446
447 - ``FPEN=b'11``
448
4493. ``PSTATE``
450
451 - ``D,A,I,F=1``
452 - ``CurrentEL=0`` (EL0)
453 - ``SpSel=0`` (Thread mode)
454 - ``NRW=0`` (AArch64)
455
456General Purpose Register Setup
457^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
458
459SPM will invoke the entry point of a service by executing an ERET instruction.
460This transition into S-EL0 is special since it is not in response to a previous
461request through a SVC instruction. This is the first entry into S-EL0. The
462general purpose register usage at the time of entry will be as specified in the
463"Return State" column of Table 3-1 in Section 3.1 "Register use in AArch64 SMC
464calls" of the `SMC Calling Convention`_ (*ARM DEN 0028B*) specification. In
465addition, certain other restrictions will be applied as described below.
466
4671. ``SP_EL0``
468
469 A non-zero value will indicate that the SPM has initialised the stack pointer
470 for the current CPU.
471
472 The value will be 0 otherwise.
473
4742. ``X4-X30``
475
476 The values of these registers will be 0.
477
4783. ``X0-X3``
479
480 Parameters passed by the SPM.
481
482 - ``X0``: Virtual address of a buffer shared between EL3 and S-EL0. The
483 buffer will be mapped in the Secure EL1&0 translation regime with read-only
484 memory attributes described earlier.
485
486 - ``X1``: Size of the buffer in bytes.
487
488 - ``X2``: Cookie value (*IMPLEMENTATION DEFINED*).
489
490 - ``X3``: Cookie value (*IMPLEMENTATION DEFINED*).
491
492Runtime Event Delegation
493------------------------
494
495The SPM receives requests for Secure Partition services through a synchronous
496invocation (i.e. a SMC from the Non-secure world). These requests are delegated
497to the partition by programming a return from the last
498``SP_EVENT_COMPLETE_AARCH64`` call received from the partition. The last call
499was made to signal either completion of Secure Partition initialisation or
500completion of a partition service request.
501
502``SP_EVENT_COMPLETE_AARCH64``
503^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
504
505- Description
506
507 Signal completion of the last SP service request.
508
509- Parameters
510
511 - **uint32** - Function ID
512
513 - SVC64 Version: **0xC4000061**
514
515 - **int32** - Event Status Code
516
517 Zero or a positive value indicates that the event was handled successfully.
518 The values depend upon the original event that was delegated to the Secure
519 partition. They are described as follows.
520
521 - ``SUCCESS`` : Used to indicate that the Secure Partition was initialised
522 or a runtime request was handled successfully.
523
524 - Any other value greater than 0 is used to pass a specific Event Status
525 code in response to a runtime event.
526
527 A negative value indicates an error. The values of Event Status code depend
528 on the original event.
529
530- Return parameters
531
532 - **int32** - Event ID/Return Code
533
534 Zero or a positive value specifies the unique ID of the event being
535 delegated to the partition by the SPM.
536
537 In the current implementation, this parameter contains the function ID of
538 the ``MM_COMMUNICATE`` SMC. This value indicates to the partition that an
539 event has been delegated to it in response to an ``MM_COMMUNICATE`` request
540 from the Non-secure world.
541
542 A negative value indicates an error. The format of the value is as follows:
543
544 - ``NOT_SUPPORTED``: Function was called from the Non-secure world.
545
546 See `Error Codes`_ for integer values that are associated with each return
547 code.
548
549 - **uint32** - Event Context Address
550
551 Address of a buffer shared between the SPM and Secure Partition to pass
552 event specific information. The format of the data populated in the buffer
553 is implementation defined.
554
555 The buffer is mapped in the Secure EL1&0 translation regime with read-only
556 memory attributes described earlier.
557
558 For the SVC64 version, this parameter is a 64-bit Virtual Address (VA).
559
560 For the SVC32 version, this parameter is a 32-bit Virtual Address (VA).
561
562 - **uint32** - Event context size
563
564 Size of the memory starting at Event Address.
565
566 - **uint32/uint64** - Event Cookie
567
568 This is an optional parameter. If unused its value is SBZ.
569
570- Usage
571
572 This function signals to the SPM that the handling of the last event delegated
573 to a partition has completed. The partition is ready to handle its next event.
574 A return from this function is in response to the next event that will be
575 delegated to the partition. The return parameters describe the next event.
576
577- Caller responsibilities
578
579 A Secure Partition must only call ``SP_EVENT_COMPLETE_AARCH64`` to signal
580 completion of a request that was delegated to it by the SPM.
581
582- Callee responsibilities
583
584 When the SPM receives this call from a Secure Partition, the corresponding
585 syndrome information can be used to return control through an ERET
586 instruction, to the instruction immediately after the call in the Secure
587 Partition context. This syndrome information comprises of general purpose and
588 system register values when the call was made.
589
590 The SPM must save this syndrome information and use it to delegate the next
591 event to the Secure Partition. The return parameters of this interface must
592 specify the properties of the event and be populated in ``X0-X3/W0-W3``
593 registers.
594
595Secure Partition Memory Management
596----------------------------------
597
598A Secure Partition executes at S-EL0, which is an unprivileged Exception Level.
599The SPM is responsible for enabling access to regions of memory in the system
600address map from a Secure Partition. This is done by mapping these regions in
601the Secure EL1&0 Translation regime with appropriate memory attributes.
602Attributes refer to memory type, permission, cacheability and shareability
603attributes used in the Translation tables. The definitions of these attributes
604and their usage can be found in the `ARMv8 ARM`_ (*ARM DDI 0487*).
605
606All memory required by the Secure Partition is allocated upfront in the SPM,
607even before handing over to the Secure Partition for the first time. The initial
608access permissions of the memory regions are statically provided by the platform
609port and should allow the Secure Partition to run its initialisation code.
610
611However, they might not suit the final needs of the Secure Partition because its
612final memory layout might not be known until the Secure Partition initialises
613itself. As the Secure Partition initialises its runtime environment it might,
614for example, load dynamically some modules. For instance, a Secure Partition
615could implement a loader for a standard executable file format (e.g. an PE-COFF
616loader for loading executable files at runtime). These executable files will be
617a part of the Secure Partition image. The location of various sections in an
618executable file and their permission attributes (e.g. read-write data, read-only
619data and code) will be known only when the file is loaded into memory.
620
621In this case, the Secure Partition needs a way to change the access permissions
622of its memory regions. The SPM provides this feature through the
623``SP_MEMORY_ATTRIBUTES_SET_AARCH64`` SVC interface. This interface is available
624to the Secure Partition during a specific time window: from the first entry into
625the Secure Partition up to the first ``SP_EVENT_COMPLETE`` call that signals the
626Secure Partition has finished its initialisation. Once the initialisation is
627complete, the SPM does not allow changes to the memory attributes.
628
629This section describes the standard SVC interface that is implemented by the SPM
630to determine and change permission attributes of memory regions that belong to a
631Secure Partition.
632
633``SP_MEMORY_ATTRIBUTES_GET_AARCH64``
634^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
635
636- Description
637
638 Request the permission attributes of a memory region from S-EL0.
639
640- Parameters
641
642 - **uint32** Function ID
643
644 - SVC64 Version: **0xC4000064**
645
646 - **uint64** Base Address
647
648 This parameter is a 64-bit Virtual Address (VA).
649
650 There are no alignment restrictions on the Base Address. The permission
651 attributes of the translation granule it lies in are returned.
652
653- Return parameters
654
655 - **int32** - Memory Attributes/Return Code
656
657 On success the format of the Return Code is as follows:
658
659 - Bits[1:0] : Data access permission
660
661 - b'00 : No access
662 - b'01 : Read-Write access
663 - b'10 : Reserved
664 - b'11 : Read-only access
665
666 - Bit[2]: Instruction access permission
667
668 - b'0 : Executable
669 - b'1 : Non-executable
670
671 - Bit[30:3] : Reserved. SBZ.
672
673 - Bit[31] : Must be 0
674
675 On failure the following error codes are returned:
676
677 - ``INVALID_PARAMETERS``: The Secure Partition is not allowed to access the
678 memory region the Base Address lies in.
679
680 - ``NOT_SUPPORTED`` : The SPM does not support retrieval of attributes of
681 any memory page that is accessible by the Secure Partition, or the
682 function was called from the Non-secure world. Also returned if it is
683 used after ``SP_EVENT_COMPLETE_AARCH64``.
684
685 See `Error Codes`_ for integer values that are associated with each return
686 code.
687
688- Usage
689
690 This function is used to request the permission attributes for S-EL0 on a
691 memory region accessible from a Secure Partition. The size of the memory
692 region is equal to the Translation Granule size used in the Secure EL1&0
693 translation regime. Requests to retrieve other memory region attributes are
694 not currently supported.
695
696- Caller responsibilities
697
698 The caller must obtain the Translation Granule Size of the Secure EL1&0
699 translation regime from the SPM through an implementation defined method.
700
701- Callee responsibilities
702
703 The SPM must not return the memory access controls for a page of memory that
704 is not accessible from a Secure Partition.
705
706``SP_MEMORY_ATTRIBUTES_SET_AARCH64``
707^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
708
709- Description
710
711 Set the permission attributes of a memory region from S-EL0.
712
713- Parameters
714
715 - **uint32** - Function ID
716
717 - SVC64 Version: **0xC4000065**
718
719 - **uint64** - Base Address
720
721 This parameter is a 64-bit Virtual Address (VA).
722
723 The alignment of the Base Address must be greater than or equal to the size
724 of the Translation Granule Size used in the Secure EL1&0 translation
725 regime.
726
727 - **uint32** - Page count
728
729 Number of pages starting from the Base Address whose memory attributes
730 should be changed. The page size is equal to the Translation Granule Size.
731
732 - **uint32** - Memory Access Controls
733
734 - Bits[1:0] : Data access permission
735
736 - b'00 : No access
737 - b'01 : Read-Write access
738 - b'10 : Reserved
739 - b'11 : Read-only access
740
741 - Bit[2] : Instruction access permission
742
743 - b'0 : Executable
744 - b'1 : Non-executable
745
746 - Bits[31:3] : Reserved. SBZ.
747
748 A combination of attributes that mark the region with RW and Executable
749 permissions is prohibited. A request to mark a device memory region with
750 Executable permissions is prohibited.
751
752- Return parameters
753
754 - **int32** - Return Code
755
756 - ``SUCCESS``: The Memory Access Controls were changed successfully.
757
758 - ``DENIED``: The SPM is servicing a request to change the attributes of a
759 memory region that overlaps with the region specified in this request.
760
761 - ``INVALID_PARAMETER``: An invalid combination of Memory Access Controls
762 has been specified. The Base Address is not correctly aligned. The Secure
763 Partition is not allowed to access part or all of the memory region
764 specified in the call.
765
766 - ``NO_MEMORY``: The SPM does not have memory resources to change the
767 attributes of the memory region in the translation tables.
768
769 - ``NOT_SUPPORTED``: The SPM does not permit change of attributes of any
770 memory region that is accessible by the Secure Partition. Function was
771 called from the Non-secure world. Also returned if it is used after
772 ``SP_EVENT_COMPLETE_AARCH64``.
773
774 See `Error Codes`_ for integer values that are associated with each return
775 code.
776
777- Usage
778
779 This function is used to change the permission attributes for S-EL0 on a
780 memory region accessible from a Secure Partition. The size of the memory
781 region is equal to the Translation Granule size used in the Secure EL1&0
782 translation regime. Requests to change other memory region attributes are not
783 currently supported.
784
785 This function is only available at boot time. This interface is revoked after
786 the Secure Partition sends the first ``SP_EVENT_COMPLETE_AARCH64`` to signal
787 that it is initialised and ready to receive run-time requests.
788
789- Caller responsibilities
790
791 The caller must obtain the Translation Granule Size of the Secure EL1&0
792 translation regime from the SPM through an implementation defined method.
793
794- Callee responsibilities
795
796 The SPM must preserve the original memory access controls of the region of
797 memory in case of an unsuccessful call.  The SPM must preserve the consistency
798 of the S-EL1 translation regime if this function is called on different PEs
799 concurrently and the memory regions specified overlap.
800
801Error Codes
802-----------
803
804.. csv-table::
805 :header: "Name", "Value"
806
807 ``SUCCESS``,0
808 ``NOT_SUPPORTED``,-1
809 ``INVALID_PARAMETER``,-2
810 ``DENIED``,-3
811 ``NO_MEMORY``,-5
812 ``NOT_PRESENT``,-7
813
814--------------
815
816*Copyright (c) 2017, Arm Limited and Contributors. All rights reserved.*
817
818.. _ARMv8 ARM: https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
819.. _instructions in the EDK2 repository: https://github.com/tianocore/edk2-staging/blob/AArch64StandaloneMm/HowtoBuild.MD
820.. _Management Mode Interface Specification: http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf
821.. _SDEI Specification: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
822.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
823
824.. |Image 1| image:: diagrams/secure_sw_stack_tos.png
825.. |Image 2| image:: diagrams/secure_sw_stack_sp.png