Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 1 | ARM Trusted Firmware for Socionext UniPhier SoCs |
| 2 | ================================================ |
| 3 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 4 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 5 | Socionext UniPhier ARMv8-A SoCs use ARM Trusted Firmware as the secure world |
| 6 | firmware, supporting BL1, BL2, and BL31. |
| 7 | |
| 8 | UniPhier SoC family implements its internal boot ROM, so BL1 is used as pseudo |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 9 | ROM (i.e. runs in RAM). The internal boot ROM loads 64KB [1]_ image from a |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 10 | non-volatile storage to the on-chip SRAM. Unfortunately, BL1 does not fit in |
| 11 | the 64KB limit if `Trusted Board Boot`_ (TBB) is enabled. To solve this problem, |
| 12 | Socionext provides a first stage loader called `UniPhier BL`_. This loader runs |
| 13 | in the on-chip SRAM, initializes the DRAM, expands BL1 there, and hands the |
| 14 | control over to it. Therefore, all images of ARM Trusted Firmware run in DRAM. |
| 15 | |
| 16 | The UniPhier platform works with/without TBB. See below for the build process |
| 17 | of each case. The image authentication for the UniPhier platform fully |
| 18 | complies with the Trusted Board Boot Requirements (TBBR) specification. |
| 19 | |
| 20 | The UniPhier BL does not implement the authentication functionality, that is, |
| 21 | it can not verify the BL1 image by itself. Instead, the UniPhier BL assures |
| 22 | the BL1 validity in a different way; BL1 is GZIP-compressed and appended to |
| 23 | the UniPhier BL. The concatenation of the UniPhier BL and the compressed BL1 |
| 24 | fits in the 64KB limit. The concatenated image is loaded by the boot ROM |
| 25 | (and verified if the chip fuses are blown). |
| 26 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 27 | |
| 28 | Boot Flow |
| 29 | --------- |
| 30 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 31 | 1. The Boot ROM |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 32 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 33 | This is hard-wired ROM, so never corrupted. It loads the UniPhier BL (with |
| 34 | compressed-BL1 appended) into the on-chip SRAM. If the SoC fuses are blown, |
| 35 | the image is verified by the SoC's own method. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 36 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 37 | 2. UniPhier BL |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 38 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 39 | This runs in the on-chip SRAM. After the minimum SoC initialization and DRAM |
| 40 | setup, it decompresses the appended BL1 image into the DRAM, then jumps to |
| 41 | the BL1 entry. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 42 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 43 | 3. BL1 |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 44 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 45 | This runs in the DRAM. It extracts BL2 from FIP (Firmware Image Package). |
| 46 | If TBB is enabled, the BL2 is authenticated by the standard mechanism of ARM |
| 47 | Trusted Firmware. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 48 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 49 | 4. BL2, BL31, and more |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 50 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 51 | They all run in the DRAM, and are authenticated by the standard mechanism if |
| 52 | TBB is enabled. See `Firmware Design`_ for details. |
| 53 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 54 | |
| 55 | Basic Build |
| 56 | ----------- |
| 57 | |
| 58 | BL1 must be compressed for the reason above. The UniPhier's platform makefile |
| 59 | provides a build target ``bl1_gzip`` for this. |
| 60 | |
| 61 | For a non-secure boot loader (aka BL33), U-Boot is well supported for UniPhier |
| 62 | SoCs. The U-Boot image (``u-boot.bin``) must be built in advance. For the build |
| 63 | procedure of U-Boot, refer to the document in the `U-Boot`_ project. |
| 64 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 65 | To build minimum functionality for UniPhier (without TBB):: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 66 | |
| 67 | make CROSS_COMPILE=<gcc-prefix> PLAT=uniphier BL33=<path-to-BL33> bl1_gzip fip |
| 68 | |
| 69 | Output images: |
| 70 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 71 | - ``bl1.bin.gzip`` |
| 72 | - ``fip.bin`` |
| 73 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 74 | |
| 75 | Optional features |
| 76 | ----------------- |
| 77 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 78 | - Trusted Board Boot |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 79 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 80 | `mbed TLS`_ is needed as the cryptographic and image parser modules. |
| 81 | Refer to the `User Guide`_ for the appropriate version of mbed TLS. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 82 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 83 | To enable TBB, add the following options to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 84 | |
| 85 | TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=<path-to-mbedtls> |
| 86 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 87 | - System Control Processor (SCP) |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 88 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 89 | If desired, FIP can include an SCP BL2 image. If BL2 finds an SCP BL2 image |
| 90 | in FIP, BL2 loads it into DRAM and kicks the SCP. Most of UniPhier boards |
| 91 | still work without SCP, but SCP provides better power management support. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 92 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 93 | To include SCP BL2, add the following option to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 94 | |
| 95 | SCP_BL2=<path-to-SCP> |
| 96 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 97 | - BL32 (Secure Payload) |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 98 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 99 | To enable BL32, add the following options to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 100 | |
| 101 | SPD=<spd> BL32=<path-to-BL32> |
| 102 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 103 | If you use TSP for BL32, ``BL32=<path-to-BL32>`` is not required. Just add the |
| 104 | following:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 105 | |
| 106 | SPD=tspd |
| 107 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 108 | |
| 109 | .. [1] Some SoCs can load 80KB, but the software implementation must be aligned |
| 110 | to the lowest common denominator. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 111 | .. _Trusted Board Boot: ../trusted-board-boot.rst |
| 112 | .. _UniPhier BL: https://github.com/uniphier/uniphier-bl |
| 113 | .. _Firmware Design: ../firmware-design.rst |
| 114 | .. _U-Boot: https://www.denx.de/wiki/U-Boot |
| 115 | .. _mbed TLS: https://tls.mbed.org/ |
| 116 | .. _User Guide: ../user-guide.rst |